CXD2931GA-9 查看數據表（PDF） - Sony Semiconductor
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CXD2931GA-9 Datasheet PDF : 27 Pages
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CXD2931R-9/GA-9
• External Data Access Timing (ICS0, ICS1/XROMW = 0)
(1) Read (half-word access/XROMW = 0)
CLKOUT
(b)
IADR
(c)
ICS0, ICS1
(e)
IRD
IB
(2) Write (half-word access/XROMW = 0)
(a)
(g)
(16)
(d)
(f)
(h)
CLKOUT
IADR
ICS0, ICS1
IWR
IB
(a)
(b)
(c)
(d)
(i)
(j)
(k)
(l)
(16)
No.
Item
(a) Read/write cycle time (Fex: @20MHz)
(b) Address delay time
(c) Chip select fall delay time
(d) Chip select rise delay time
(e) Read signal fall delay time
(f) Read signal rise delay time
(g) Read data setup time
(h) Read data hold time
(i) Write signal fall delay time
(j) Write signal rise delay time
(k) Write data established time
(l) Write data hold time
Min.
Typ.
Max.
Unit
—
100
—
ns
—
—
12
ns
2
—
10
ns
2
—
10
ns
0
—
3
ns
0
—
5
ns
11
—
—
ns
0
—
—
ns
0
—
1
ns
0
—
2
ns
—
—
5
ns
5
—
—
ns
– 14 –
∗ The load capacitance = 30pF.
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