CY62148VN(2010) 查看數據表（PDF） - Cypress Semiconductor

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CY62148VN
(Rev.:2010)

4 Mbit (512K x 8) Static RAM

Cypress Semiconductor 

CY62148VN MoBL®

Switching Waveforms (continued)

Figure 7. Write Cycle 2: CE Controlled [8, 13, 14]

tWC

ADDRESS

CE

tSCE

tSA

tAW

tHA

WE

DATA I/O

tSD

tHD

DATAIN VALID

ADDRESS

Figure 8. Write Cycle 3: WE controlled, OE LOW [14]

tWC

CE

tAW

tHA

WE

tSA

DATA I/O

NOTE 15

tHZWE

tSD

DATAIN VALID

tHD

tLZWE

Note

15. During this period, the I/Os are in output state. Do not apply input signals.

Document Number : 001-55636 Rev. *A

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