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KU80960CA25 查看數據表(PDF) - Intel

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KU80960CA25 Datasheet PDF : 68 Pages
First Prev 61 62 63 64 65 66 67 68
80960CA-33, -25, -16
PCLK2
DREQ
ADS
DACK
TC
Note: Terminal Count becomes active during the last bus request of a buffer transfer. If the
last LOAD/STORE bus request is executed as multiple bus accesses, the TC will be active
for the entire bus request. Refer to the i960® Cx Microprocessor User’s Manual for
further information.
F_CX046A
Figure 45. Terminal Count Functional Timing
RESET
FAIL
~65,000 Cycles
(Internal Self-Test)
Pass
Fail
5 Cycles
102 Cycles
Figure 46. FAIL Functional Timing
(Bus Test)
Pass
Fail
F_CX047A
60

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