DP805X 查看數據表（PDF） - Digital Core Design

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产品描述 (功能)

生产厂家

DP805X

Pipelined High Performance Microcontroller

Digital Core Design 

DP805x Instructions set details

3.5.3. ANL A, @RI

- 21 -

Operation: (PC) ← (PC) + 1

(A) ← (A) and ((Ri))

Bytes:

1

Cycles:

2

Encoding:

0101011 i

3.5.4. ANL A, #DATA

Operation: (PC) ← (PC) + 2

(A) ← (A) and #data

Bytes:

2

Cycles:

2

Encoding:

01010100

immediate data

3.5.5. ANL DIRECT, A

Operation: (PC) ← (PC) + 2

(direct) ← (direct) and (A)

Bytes:

2

Cycles:

3

Encoding:

01010010

direct address

3.5.6. ANL DIRECT, #DATA

Operation: (PC) ← (PC) + 3

(direct) ← (direct) and #data

Bytes:

3

Cycles:

3

Encoding:

01010011

direct address

immediate data

Instruction: ANL C, <src-bit>

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