DS1845B-100 查看數據表（PDF） - Dallas Semiconductor -> Maxim Integrated

零件编号

产品描述 (功能)

生产厂家

DS1845B-100

Dual NV Potentiometer and Memory

Dallas Semiconductor -> Maxim Integrated 

DS1845

H0, H1 – These are the high-end terminals of the potentiometers. For both potentiometers, it is not

required that these terminals be connected to a potential greater than the low-end terminal of the

potentiometer. Voltage applied to the high end of the potentiometers cannot exceed the power supply

voltage, VCC, or go below ground.

L0, L1 – These are the low-end terminals of the potentiometers. It is not required that these terminals be

connected to a potential less than the high-end terminals of the pot. Voltage applied to the low end of the

potentiometers cannot exceed the power-supply voltage, VCC, or go below ground.

W0, W1 - Wiper of the Potentiometer. This pin is the wiper terminal of the potentiometer. The bytes in

EEPROM memory locations F8h and F9h determine each wiper’s setting. Voltage applied to either

wiper terminal cannot exceed the power-supply voltage, VCC, or go below ground.

MEMORY ORGANIZATION

The DS1845’s serial EEPROM is internally organized with 256 words of 1 byte each. Each word requires

an 8-bit address for random word addressing. The byte at address F9h determines the wiper setting for

potentiometer 0, which contains 100 positions. Writing values above 63h to this address sets the wiper to

its uppermost position. The byte at address F8h determines the wiper setting for potentiometer 1, which

contains 256 positions (00h to FFh). Address locations FAh though FFh are reserved and should not be

written.

DEVICE OPERATION

Clock and Data Transitions: The SDA pin is normally pulled high with an external resistor or device.

Data on the SDA pin may only change during SCL low time periods. Data changes during SCL high

periods will indicate a start or stop conditions depending on the conditions discussed below. Refer to the

timing diagram Fig 2 for further details.

Start Condition: A high-to-low transition of SDA with SCL high is a start condition which must

precede any other command. Refer to the timing diagram Fig 2 for further details.

Stop Condition: A low-to-high transition of SDA with SCL high is a stop condition. After a read

sequence, the stop command places the DS1845 into a low-power mode. Refer to the timing diagram Fig

2 for further details.

Acknowledge: All address and data byte are transmitted via a serial protocol. The DS1845 pulls the

SDA line low during the ninth clock pulse to acknowledge that it has received each word.

Standby Mode: The DS1845 features a low-power mode that is automatically enabled after power-on,

after a stop command, and after the completion of all internal operations.

2-Wire Interface Reset: After any interruption in protocol, power loss, or system reset, the following

steps reset the DS1845.

1. Clock up to nine cycles.

2. Look for SDA high in each cycle while SCL is high.

3. Create a start condition while SDA is high.

3 of 13

Share Link: