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DS17285E5 查看數據表(PDF) - Maxim Integrated

零件编号
产品描述 (功能)
生产厂家
DS17285E5
MaximIC
Maxim Integrated MaximIC
DS17285E5 Datasheet PDF : 30 Pages
First Prev 11 12 13 14 15 16 17 18 19 20 Next Last
Real-Time Clocks
Bits 3 to 0: Rate Selector Bits (RS3 to RS0). These
four rate-selection bits select one of the 13 taps on the
15-stage divider or disable the divider output. The tap
selected can be used to generate an output square
wave (SQW pin) and/or a periodic interrupt. The user
can do one of the following:
1) Enable the interrupt with the PIE bit;
2) Enable the SQW output pin with the SQWE or E32k
bits;
3) Enable both at the same time and the same rate; or
4) Enable neither.
Table 4 lists the periodic interrupt rates and the square-
wave frequencies that can be chosen with the RS bits.
Table 4. Periodic Interrupt Rate and Square-Wave Output Frequency
EXT REG B
E32K
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
SELECT BITS REGISTER A
RS3
RS2
RS1
RS0
0
0
0
0
0
0
0
1
0
0
1
0
0
0
1
1
0
1
0
0
0
1
0
1
0
1
1
0
0
1
1
1
1
0
0
0
1
0
0
1
1
0
1
0
1
0
1
1
1
1
0
0
1
1
0
1
1
1
1
0
1
1
1
1
X
X
X
X
tPI PERIODIC INTERRUPT
RATE
None
3.90625ms
7.8125ms
122.070µs
244.141µs
488.281µs
976.5625µs
1.953125ms
3.90625ms
7.8125ms
15.625ms
31.25ms
62.5ms
125ms
250ms
500ms
*
*RS3 to RS0 determine periodic interrupt rates as listed for E32K = 0.
SQW OUTPUT FREQUENCY
None
256Hz
128Hz
8.192kHz
4.096kHz
2.048kHz
1.024kHz
512Hz
256Hz
128Hz
64Hz
32Hz
16Hz
8Hz
4Hz
2Hz
32.768kHz
____________________________________________________________________ 15

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