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DS1923 查看數據表(PDF) - Dallas Semiconductor -> Maxim Integrated

零件编号
产品描述 (功能)
生产厂家
DS1923
Dallas
Dallas Semiconductor -> Maxim Integrated Dallas
DS1923 Datasheet PDF : 52 Pages
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DS1923: Hygrochron Temperature/Humidity Logger iButton with 8kB Data Log Memory
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX UNITS
IO Pin, 1-Wire Write
Standard speed
60
120
Write-0 Low Time
(Note 1)
tW0L
Overdrive speed, VPUP > 4.5V
(Note 11)
6
12
µs
Overdrive speed (Note 11)
7.5
12
Write-1 Low Time
(Notes 1, 13)
tW1L
Standard speed
Overdrive speed
5
1
15 - e
1.95 - e
µs
IO Pin, 1-Wire Read
Read Low Time
(Notes 1, 14)
tRL
Standard speed
Overdrive speed
5
1
15 - d µs
1.95 - d
Read Sample Time
(Notes 1, 14)
Real-Time Clock
tMSR
Standard speed
Overdrive speed
tRL + d
tRL + d
15
1.95
µs
Accuracy
+25°C
-3
+3
min./
month
Frequency Deviation
DF
Temperature Converter
-20°C to +85°C
-300
+60 PPM
Conversion Time
tCONV
8-bit mode (Note 15)
16-bit mode (11 bits)
30
240
75
600
ms
Thermal Response
Time Constant
tRESP iButton package (Note 16)
130
s
Conversion Error
Without Software
Correction
DJ
(Notes 15, 17, 18, 19)
See Temperature
Accuracy Graphs
°C
Conversion Error With
Software Correction
DJ
(Notes 15, 17, 18, 19)
See Temperature
Accuracy Graphs
°C
Humidity Converter (Note 30)
Humidity Response
Time Constant
tRH
Slow moving air (Note 20)
30
s
RH Resolution
(Note 21)
8
12
12
bits
0.64 0.04 0.04 %RH
RH Range
(Note 22)
0
100 %RH
RH Accuracy and
Interchangeability
With software correction
(Notes 18, 19, 23, 24, 25)
±5
%RH
RH Nonlinearity
With software correction (Note 18)
<1
RH Hysteresis
(Notes 26, 27)
0.5
%RH
RH Repeatability
(Note 28)
±0.5
%RH
Long-Term Stability
At 50%RH (Note 29)
<1.0
%RH/y
Note 1:
Note 2:
Note 3:
Note 4:
Note 5:
Note 6:
Note 7:
Note 8:
Note 9:
Note 10:
Note 11:
Note 12:
Note 13:
Note 14:
Note 15:
Note 16:
System requirement.
Maximum allowable pullup resistance is a function of the number of 1-Wire devices in the system and 1-Wire recovery times. The
specified value here applies to systems with only one device and with the minimum 1-Wire recovery times. For more heavily
loaded systems, an active pullup such as that found in the DS2480B may be required.
Capacitance on the data pin could be 800pF when VPUP is first applied. If a 2.2kW resistor is used to pull up the data line 2.5µs
after VPUP has been applied, the parasite capacitance does not affect normal communications.
VTL, VTH are a function of the internal supply voltage.
Voltage below which, during a falling edge on IO, a logic '0' is detected.
The voltage on IO needs to be less or equal to VILMAX whenever the master drives the line low.
Voltage above which, during a rising edge on IO, a logic '1' is detected.
After VTH is crossed during a rising edge on IO, the voltage on IO has to drop by VHY to be detected as logic '0'.
The I-V characteristic is linear for voltages less than 1V.
The earliest recognition of a negative edge is possible at tREH after VTH has been previously reached.
Highlighted numbers are NOT in compliance with the published iButton standards. See comparison table below.
Interval during the negative edge on IO at the beginning of a presence detect pulse between the time at which the voltage is 90%
of VPUP and the time at which the voltage is 10% of VPUP.
e represents the time required for the pullup circuitry to pull the voltage on IO up from VIL to VTH.
d represents the time required for the pullup circuitry to pull the voltage on IO up from VIL to the input high threshold of the bus
master.
To conserve battery power, use 8-bit temperature logging whenever possible.
This number was derived from a test conducted by Cemagref in Antony, France, in July of 2000.
http://www.cemagref.fr/English/index.htm Test Report No. E42.
3 of 52

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