DS2251T(1995) 查看數據表（PDF） - Dallas Semiconductor -> Maxim Integrated
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DS2251T Datasheet PDF : 19 Pages
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DS2251T
AC CHARACTERISTICS (cont’d)
PARALLEL PROGRAM LOAD TIMING
# PARAMETER
41 Pulse Width of PE3–4
45 Byte–wide Address Hold after PE3–4
High During MOVX
46 Delay from Byte–wide Address Valid
PE3–4 Low During MOVX
47 Byte–wide Data Setup to PE3–4 High
During MOVX (read)
48 Byte–wide Data Hold after PE3–4 High
During MOVX (read)
49 Byte–wide Address Valid to R/W Active
During MOVX (write)
50 Delay from R/W Low to Valid Data Out
During MOVX (write)
51 Valid Data Out Hold Time from PE3–4
High
52 Valid Data Out Hold Time from R/W High
53 Write Pulse Width (R/W Low Time)
SYMBOL
tCEPW
tCEHDA
tCELDA
tDACEH
tCEHDV
tAVRWL
tRWLDV
tCEHDV
tRWHDV
tRWLPW
(tA = 0°C to70°C; VCC = 5V + 10%)
MIN
MAX
UNITS
4tCLK–35
ns
4tCLK–30
ns
4tCLK–35
ns
1tCLK+40
ns
10
ns
3tCLK–35
ns
20
ns
1tCLK–15
ns
0
ns
6tCLK–20
ns
BYTE–WIDE BUS TIMING
3
PE3, PE4
121395 15/19
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