DS2465P(2013) 查看數據表（PDF） - Maxim Integrated

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DS2465P
(Rev.:2013)

DeepCover Secure Authenticator with SHA-256 Coprocessor and 1-Wire Master Function

Maxim Integrated 

ABRIDGED DATA SHEET

DS2465

DeepCover Secure Authenticator with

SHA-256 Coprocessor and 1-Wire Master Function

ELECTRICAL CHARACTERISTICS (continued)

(TA = -40NC to +85NC, unless otherwise noted.) (Note 1)

PARAMETER

Read Sample Time

Write-0 Low Time

Write-0 Recovery Time

SYMBOL

tMSR

tW0L

Standard

Overdrive

Standard

Overdrive

CONDITIONS

tREC0 Standard and overdrive

MIN TYP

11.4

12

1.4

1.5

-5%

See

Table 6

-5%

See

Table 6

MAX

13.1

1.64

+9%

+9%

UNITS

Fs

Fs

Fs

1-Wire Time Slot

SHA-256 ENGINE

tslot Standard and overdrive

Equal to tW0L + tREC0

Fs

Computation Current

Computation Time

EEPROM

Programming Current

Programming Time for a 32-Bit

Segment

Write/Erase Cycling Endurance

Data Retention

SLPZ PIN

Low Level Input Voltage

ICSHA

tCSHA

IPROG

tPROG

NCY

tDR

VIL

High Level Input Voltage

VIH

Input Leakage Current

Wake-Up Time from Sleep Mode

I2C SCL AND SDA PINS (Note 13)

II

tSWUP

(Notes 3, 7)

Refer to the full data sheet.

TA = +85NC (Notes 8, 9)

TA = +85NC (Notes 10, 11)

Pin at 3.63V (Note 3)

(Note 12)

100k

10

-0.5

0.7 O

VCC

mA

ms

2

mA

10

ms

—

Years

0.3 O VCC

V

VCC +

0.5V

V

0.1

FA

200

Fs

Low Level Input Voltage

High Level Input Voltage

Hysteresis of Schmitt Trigger

Inputs

Low Level Output Voltage at 3mA

Sink Current

VIL

VIH

VHYS

VOL

(Note 3)

-0.5

0.7 O

VCC

0.05 O

VCC

0.3 O VCC

V

VCC(MAX)

+ 0.5V

V

V

0.4

V

Output Fall Time from VIH(MIN) to

VIL(MAX) with a Bus Capacitance

from 10pF to 400pF

tOF (Note 3)

60

250

ns

Pulse Width of Spikes That Are

Suppressed by the Input Filter

tSP

(Note 3)

50

ns

Input Current with an Input

Voltage Between 0.1VCC(MAX)

and 0.9VCC(MAX)

II

(Notes 3, 14)

-10

+10

FA

Maxim Integrated

  3

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