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DS2711 查看數據表(PDF) - Maxim Integrated

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DS2711
MaximIC
Maxim Integrated MaximIC
DS2711 Datasheet PDF : 15 Pages
First Prev 11 12 13 14 15
DS2711/DS2712: Loose-Cell NiMH Chargers
Cell Voltage Monitoring
In the 2-cell series mode, the voltage difference between VP2 and VP1 is used to determine the Vcell2 voltage in
the two-cell series stack. The voltage difference between VP1 and VN1 is used to determine the Vcell1 voltage. In
the 1-cell series mode, the difference between VP1 and VN1 is used as the cell voltage. VP2 can be left
disconnected in the 1-cell series mode. In parallel mode, the difference between VP2 and VN1 is used for the
Vcell2 voltage, and the difference between VP1 and VN1 is used for Vcell1 voltage.
Individual cell voltages are monitored for minimum and maximum values, using the VBAT-MIN, VBAT-MAX1 and VBAT-MAX2
threshold limits. Upon inserting a cell or power-up with cells inserted, cell voltages must be less than the VBAT-MAX1
threshold before charging begins. The VBAT-MIN threshold determines whether a precharge cycle should precede the
fast charge cycle, and when to transition from precharge to fast charge. Once fast charging commences, cell
voltages are compared to the VBAT-MAX2 threshold once per second. The comparison occurs while the charge
control pin (CC1 or CC2) controlling current to the cell is active (low). When the charge control pin is active so
charge is applied to the cell, the cell voltage is referred to as the VON voltage. When the charge-control pin is
inactive, the cell voltage is referred to as the VOFF voltage. If VBAT-MAX2 is exceeded in fast charge, charging is halted
and a fault condition is displayed. While fast charge is in progress, cell voltage measurements are stored and
compared to future measurements for charge termination and cell test purposes.
Two types of tests are performed to detect primary alkaline and lithium cells or defective NiMH or NiCd secondary
cells. Cells are tested individually in the series and parallel configurations, so that a single improper or defective
cell can be detected quickly. In the series configuration, a single defective cell will terminate charge for both cells,
whereas the parallel mode continues charging the good cell and stops charging the defective cell.
VCTST is set by the resistance from the CTST pin to ground. The nominal sensitivity of 100mV is set by connecting
an 80kresistor between CTST and VSS. The detection threshold can be set from 32mV to 400mV. The following
formula approximates the setting for the detection threshold.
VCTST = 8000/R (value in V)
-ΔV and Flat Voltage Termination
During fast charge, -V detection is performed by comparing successive voltage measurements for a drop of 2mV
in the cell voltage. A hold-off period for -V detection begins at the start of fast charging and prevents false
termination in the first few minutes of the charge cycle. Once the hold-off period expires, cell voltage
measurements are acquired every 32 clock cycles (during the CCx off time). When a newly acquired voltage
measurement is greater than any previous one, the new value is retained as the maximum value. When the cell
voltage no longer increases, the maximum value is retained and compared against subsequent values. If the cell
voltage drops by the -V threshold, V-V, (2mV typ), fast charging is terminated. If the cell voltage remains flat such
that the maximum value persists for a period of 16 minutes (tFLAT), fast charge terminates and top-off charging
begins.
Top-Off and Maintenance
In top-off mode, the charger scales the cell current to 25% of the fast charge current. The charge timer is reset and
restarted with a timeout period of one-half the fast-charge duration. When the charge timer expires in top-off, the
charger enters maintenance and delivers 1/64 of the charge source current to the cells. Maintenance charge
continuous until power is removed, the cell(s) are removed or the DS2711/DS2712 is cycled into and out of
suspend mode by disconnecting the TMR pin.
Selecting the Charge Mode
The charge mode configuration is selected by testing the LED2 pin during startup. An internal current source tests
the state of the LED2 pin by pulling up and pulling down on the pin to determine if it is high, low, or open. The
recommended pullup or pulldown resistor value (if used) is 100k. In the parallel charging circuit diagrams on page
7, no resistor is shown. The current path through the LED and 270resistor is sufficient to pull the LED2 pin high
at power-up to select the parallel mode. See to the mode test current (IMTST) specification in the DC Electrical
Characteristics table to select other pullup values.
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