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DS2756(2006) 查看數據表(PDF) - Maxim Integrated

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DS2756 Datasheet PDF : 26 Pages
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DS2756: High-Accuracy Battery Fuel Gauge with Programmable Suspend Mode
POWER MODES
The DS2756 has three power modes: Active, Suspend and Sleep. While in Active mode, the DS2756 continuously
measures voltage, temperature, current, accumulated current, and monitors for an under voltage condition. In
Suspend and Sleep modes, the DS2756 ceases these activities. During Suspend, the DQ input buffer is active and
a low power oscillator runs. In Sleep mode, only the DQ input buffer is active.
The DS2756 enters Suspend mode when PMOD = 1 AND all of the following conditions are true:
§ the DQ line is low for longer than tSLEEP
§ the Programmable Interval Enable (PIE) bits in the Status Register are set to a non-zero value
(PIE =01b, 10b or 11b)
§ Current register value is less than the Charge Suspend Threshold AND greater than the Discharge
Suspend Threshold
Periodically, when a Suspend Period time out occurs, the DS2756 temporarily cycles from Suspend to Active mode
in order to measure current. When the current measurement completes, the result is evaluated against the user
programmed Charge and Discharge Suspend Thresholds. If the Current measurement result does not cross either
threshold, the DS2756 transitions back to Suspend. If the measurement shows that more current is flowing than the
level of either threshold, the DS2756 signals a suspend interrupt by driving the PIO pin low, then remains in Active
mode continuing normal Active mode operation.
The DS2756 enters Sleep mode when PMOD = 1 AND either of the following conditions are true:
§ the DQ line is low for longer than tSLEEP (minimum 2.1s) AND PIE = 00b
§ the UVEN bit in the Status Register is set to 1 AND the voltage on VIN drops below undervoltage threshold
VUV for tUVD (VIN measurement and comparison to VUV, and tUVD timeout occur in normal Active mode and
temporary Active mode cycle from Suspend mode)
The DS2756 returns to Active mode from Suspend or Sleep mode whenever the DQ line is pulled from a low-to-
high state.
The factory default for the DS2756 is UVEN = 0, PMOD = 0 and PIE = 00b. The DS2756 defaults to Active mode
when power is first applied.
CURRENT MEASUREMENT AND ACCUMULATION
The DS2756 current measurement system is designed to provide timely data on charge and discharge current at a
moderate resolution level while simultaneously accumulating high resolution average data to support accurate
coulomb counting. Current is measured with an Analog-to-Digital Converter (ADC) by sampling the voltage drop
across a series sense resistor, RSNS, connected between SNS and VSS. Individual current samples are taken every
687ms (1456-1 Hz). Multiple samples are averaged to report Current and Average Current values, and accumulated
for coulomb counting.
Current Measurement
The voltage signal developed across the sense resistor (between SNS and VSS) is differentially sampled by the
ADC inputs through internal 10kresistors connected between VSSand IS1, and SNS and IS2. Isolating the ADC
inputs (IS1 and IS2 pins) from the sense resistor with 10kW facilitates the use of an RC filter by adding a single
external capacitor. The RC filter extends the input range beyond ±64mV in pulse load or pulse charge applications.
The ADC accurately measures large peak signals as long as the differential signal level at IS1 and IS2 does not
exceed ±64mV.
The Current register operates in two modes, normal and snapshot. In normal mode, the Current register reports the
average of 128 individual current samples every 88ms. The reported value represents the average current during
the 88ms measurement period. The Average Current register reports the average of 4096 current samples and is
updated every 2.8s.
In snapshot mode, the Current register holds the current measured immediately following the snapshot trigger.
Current measurements resume immediately after the snapshot value is obtained, however, the SNAP bit must be
cleared to re-enable normal mode current reporting in the Current register. The Average Current register continues
to be updated while the SNAP bit is set. Current accumulation also continues while SNAP is set. Although a small
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