EDS1232CASE 查看數據表（PDF） - Elpida Memory, Inc

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EDS1232CASE

128M bits SDRAM

Elpida Memory, Inc 

EDS1232CASE

Command Truth Table for CKE

CKE

Current State

n – 1 n /CS /RAS /CAS /WE Address Operation

Notes

Self refresh

H× × × × × ×

INVALID, CLK (n – 1) would exit self refresh

L H H× × × ×

L H L HH× ×

Self refresh recovery

Self refresh recovery

L H L HL × ×

ILLEGAL

LHLL×××

LL ×××××

ILLEGAL

Continue self refresh

Self refresh recovery H H H × × × ×

Idle after tRC

HH L HH× ×

HH L HL × ×

Idle after tRC

ILLEGAL

HH L L × × ×

ILLEGAL

HL H× × × ×

HL L HH× ×

ILLEGAL

ILLEGAL

HL L HL × ×

ILLEGAL

Power down

HL L L × × ×

H× × × × ×

ILLEGAL

INVALID, CLK (n – 1) would exit power down

L H H× × × ×

EXIT power down

L H L HHH×

LL ×××××

EXIT power down

Continue power down mode

All banks idle

HH H× × ×

Refer to operations in Function Truth Table

HH L H× ×

HH L L H×

Refer to operations in Function Truth Table

Refer to operations in Function Truth Table

HH L L L H×

CBR (auto) Refresh

H H L L L L OPCODE Refer to operations in Function Truth Table

HL H× × ×

Begin power down next cycle

HL L H× ×

Refer to operations in Function Truth Table

HL L L H×

Refer to operations in Function Truth Table

HL L L L H×

Self refresh

1

H L L L L L OPCODE Refer to operations in Function Truth Table

LH×××××

Exit power down next cycle

LL ×××××

Power down

1

Row active

H× × × × × ×

Refer to operations in Function Truth Table

L× ×××××

Clock suspend

1

Any state other than H H × × × ×

Refer to operations in Function Truth Table

listed above

HL × × × × ×

Begin clock suspend next cycle

2

LH×××××

Exit clock suspend next cycle

LL ×××××

Maintain clock suspend

Remark: H = VIH, L = VIL, × = VIH or VIL

Notes: 1. Self refresh can be entered only from the all banks idle state. Power down can be entered only from all

banks idle or row active state.

2. Must be legal command as defined in Function Truth Table.

Data Sheet E0351E30 (Ver. 3.0)

20

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