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EL8172(2007) 查看數據表(PDF) - Intersil

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EL8172 Datasheet PDF : 14 Pages
First Prev 11 12 13 14
EL8171, EL8172
VIN/2
VIN/2
VCM
2.4V TO 5.5V
R1
REF
R2
RG
2.4V TO 5.5V
71
2 IN+
V+ EN
+
3 IN-
-
8 FB+ EL8171/2
6
+
5 FB- -
V-
4
RF
EN
VOUT
FIGURE 40. CIRCUIT 2 - GAIN SETTING AND REFERENCE
CONNECTION
VOUT
=
1
+
R-R----G-F--⎠⎟⎞
(
VIN
)
+
1
+
R-R----G-F--⎠⎟⎞
(
VRE
F
)
(EQ. 2)
The FB+ pin is used as a REF terminal to center or to adjust
the output. Because the FB+ pin is a high impedance input,
an economical resistor divider can be used to set the voltage
at the REF terminal without degrading or affecting the CMRR
performance. Any voltage applied to the REF terminal will
shift VOUT by VREF times the closed loop gain, which is set
by resistors RF and RG. See Circuit 2 (Figure 40). Note that
any noise or unwanted signals on the reference supply will
be amplified at the output according to Equation 2.
The FB+ pin can also be connected to the other end of resistor,
RG. See Circuit 3 (Figure 41). Keeping the basic concept that
the EL8171 and EL8172 in-amps maintain constant differential
voltage across the input terminals and feedback terminals (IN+
- IN- = FB+ - FB-), the transfer function of Circuit 3 can be
derived. Note that the VREF gain term is eliminated and
susceptibility to external noise is reduced, however the VREF
source must be capable of sourcing or sinking the feedback
current from VOUT through RF and RG.
VIN/2
VCM
VIN/2
2.4V TO 5.5V
71
2 IN+
V+ EN
+
3 IN-
-
8 FB+ EL8171/2
6
+
5 FB- -
V-
4
EN
VOUT
External Resistor Mismatches
Because of the independent pair of feedback terminals
provided by the EL8171 and EL8172, the CMRR is not
degraded by any resistor mismatches. Hence, unlike a three op
amp and especially a two op amp in-amp, the EL8171 and
EL8172 reduce the cost of external components by allowing the
use of 1% or more tolerance resistors without sacrificing CMRR
performance. The EL8171 and EL8172 CMRR will be
maintained regardless of the tolerance of the resistors used.
Gain Error and Accuracy
The EL8172 has a Gain Error (EG) of 0.2% typical. The
EL8171 has an EG of 0.15% typical. The gain error indicated
in the “Electrical Specifications” table on page 2 is the inherent
gain error of the EL8171 and EL8172 and does not include
the gain error contributed by the resistors. There is an
additional gain error due to the tolerance of the resistors used.
The resulting non-ideal transfer function effectively becomes:
VOUT
=
1
+
R-R----G-F--⎠⎟⎞
× [1 (ERG + ERF + EG)] × VIN
(EQ. 4)
Where:
ERG = Tolerance of RG
ERF = Tolerance of RF
EG = Gain Error of the EL8171 or EL8172
The term [1-(ERG +ERF +EG)] is the deviation from the
theoretical gain. Thus, (ERG +ERF +EG) is the total gain
error. For example, if 1% resistors are used for the EL8171,
the total gain error would be:
= ±(ERG + ERF + EG(typical))
= ±(0.01 + 0.01 + 0.003)
(EQ. 5)
= ±2.3%
Disable/Power-Down
The EL8171 and EL8172 can be powered down reducing
the supply current to typically 4.5µA. When disabled, the
output is in a high impedance state. The active low EN bar
pin has an internal pull-down and hence can be left floating
and the in-amp enabled by default. When the EN bar is
connected to an external logic, the in-amp will power down
when EN bar is pulled above 2V, and will power on when EN
bar is pulled below 0.8V.
RG
RF
VREF
FIGURE 41. CIRCUIT 3 - REFERENCE CONNECTION WITH AN
AVAILABLE VREF
VOUT
=
1
+
R-R----G-F--⎠⎟⎞
(
VIN
)
+
(
VREF
)
(EQ. 3)
12
FN6293.3
August 3, 2007

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