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EL8176FIZ 查看數據表(PDF) - Intersil

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EL8176FIZ Datasheet PDF : 18 Pages
First Prev 11 12 13 14 15 16 17 18
EL8176
Typical Performance Curves (Continued)
5.5
n = 12
5.0
4.5
MAX
4.0
3.5 MEDIAN
MIN
3.0
2.5
-40 -20
0 20 40 60 80
TEMPERATURE (°C)
100 120
FIGURE 45. NEGATIVE VOUT vs TEMPERATURE RL = 100k
VS = ±2.5V
0.23
n = 12
0.21
0.19
MAX
0.17
MEDIAN
0.15
0.13
MIN
0.11
0.09
-40 -20
0 20 40 60 80 100 120
TEMPERATURE (°C)
FIGURE 46. +SLEW RATE vs TEMPERATURE VS = ±2.5V
INPUT = ±0.75V, AV = 2
0.17
n = 12
0.16
MAX
0.15
0.14
MEDIAN
0.13
MIN
0.12
0.11
0.10
-40 -20 0 20 40 60 80 100 120
TEMPERATURE (°C)
FIGURE 47. -SLEW RATE vs TEMPERATURE VS = ±2.5V
INPUT = ±0.75V, AV = 2
900
n = 12
800
700
MAX
600
MEDIAN
500
400
MIN
300
200
100
0
-40 -20 0 20 40 60 80 100 120
TEMPERATURE (°C)
FIGURE 48. AVOL, RL = 100k, VS ±2.5V, VO = ±2V
Pin Descriptions
SO PIN
NUMBER
1, 5
2
3
4
6
7
8
SOT-23 PIN 6 Ld WLCSP
NUMBER PIN NUMBER
4
C1
3
C2
2
B2
A1
1
A2
6
B1
5
PIN NAME
NC
IN-
IN+
V-
DNC
OUT
V+
EN
EQUIVALENT
CIRCUIT
DESCRIPTION
No internal connection
Circuit 1 Amplifier’s inverting input
Circuit 1 Amplifier’s non-inverting input
Circuit 4 Negative power supply
Do not connect. Pin must be left floating.
Circuit 3 Amplifier’s output
Circuit 4 Positive power supply
Circuit 2
Amplifier’s enable pin with internal pull-down; Logic “1” selects the
disabled state; Logic “0” selects the enabled state.
V+
V+
EN
IN-
IN+
V-
V-
CIRCUIT 1
CIRCUIT 2
V+
V+
OUT
V-
V-
CAPACITIVELY
COUPLED
ESD CLAMP
CIRCUIT 3
CIRCUIT 4
13
FN7436.8
April 3, 2009

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