EM78815AQ 查看數據表（PDF） - ELAN Microelectronics

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EM78815AQ

8 Bit Microcontroller

ELAN Microelectronics 

EM78815

8-Bit Microcontroller

7.2.2 R1 Page 0 TCC Data Buffer

This is increased by 16.38 kHz or by the instruction cycle clock (controlled by CONT

register). Written and read by the program as any other register.

7.2.3 R1 Page 1 Interrupt Flag 1 Real Value

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

INTR7 INTR6 INTR5 INTR4 INTR3 INTR2

R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0

Bit 1

INTR1

R/W-0

Bit 0

INTR0

R/W-0

Bit 0~Bit 7(INTR0~INTR7) : Interrupt Flag 1 real value. User can clear this page

from 1 to 0 but cannot set this register to 1. The relation of R1 Page1, RE Page 0

and IOCE Page 0 is shown in the figure. When user disables the interrupt mask,

whether an interrupt occurs or not, the interrupt flag (RE Page 0) will appear “0”.

Opposite of RE Page 0, R1 Page 1 will show real interrupt occur status regardless

whether this interrupt mask is enabled or disabled. User can clear the

corresponding external interrupt flag in RE Page 0 or R1 Page 1.

Interrupt

occurs

Interrupt

Mask

IOCE, IOCF

Interrupt

Flag (RE, RF)

Real Interrupt

Flag (R0 P1,P2)

Fig. 6 Relationship between Interrupt Mask, Flag and Real Flag

7.2.4 R1 Page 2 Interrupt Flag 2 Real Value

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

RBF/STD FSK/CW

-

UART

DED

CNT2

R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0

Bit 1

CNT1

R/W-0

Bit 0

TCC

R/W-0

Bit 0~Bit 7 (Internal Interrupt Flag Real Value) : Interrupt Flag 1 real value. User

can clear this page from 1 to 0 but cannot set this register to 1. The relationship

between R1 Page 2, RF Page 0 and IOCF Page 0 is shown in Fig. 6. When user

disables an interrupt mask, whether an interrupt occurs or not, the interrupt flag (RF

Page 0) will appear “0”. Opposite of RF Page 0, R1 Page 1 will show real interrupt

occur status regardless whether this interrupt mask is enabled or disabled. User can

clear the corresponding interrupt flag in RF Page 0 or R1 Page 2.

12 •

Product Specification (V2.4) 02.17.2006

(This specification is subject to change without further notice)

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