EM78869 查看數據表（PDF） - ELAN Microelectronics
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EM78869 Datasheet PDF : 38 Pages
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EM78869
8-Bit RISC Type Microprocessor
Bit 3: (PAB) Pre-scaler assignment bit
0: For TCC use
1: For WDT use
Bit 4: Unused
Bit 5: (TS) TCC signal source
0: Internal instruction cycle clock
1: 16.384KHz or RC/2 (in RC mode)
Bit 6: (INT) INT enable flag. This bit is read only
0: Interrupt masked by DISI or hardware interrupt
1: Interrupt enabled by ENI/RETI instruction
Bit 7: INT_EDGE
0: P7.0 (INT0) interrupt source is a rising edge signal
1: P7.0 (INT0) interrupt source is a falling edge signal
NOTE
CONT is a readable and writable register.
6.2.3 IOC5 (Port 5 I/O Control Register)
Bit 7
IOC57
Bit 6
IOC56
Bit 5
IOC55
Bit 4
IOC54
Bit 3
0
Bit 2
0
Bit 1
0
Bit 0:
P5S is switch register for I/O port or LCD signal switching.
0: Select normal I/O port
1: Select SEG40~SEG43 output as LCD SEGMENT output
Bit 1: Unused.
Bit 2: Unused.
Bit 3: Unused.
Bit 4 ~7: Port 5 I/O direction control registers
0: Set the relative I/O pin as output
1: Set the relative I/O pin into high impedance
Bit 0
P5S
6.2.4 IOC6 (Port 6 I/O Control Register)
Bit 7
0
Bit 6
0
Bit 5
0
Bit 4
0
Bit 3
0
Bit 2
0
Bit 0:
Port 6 I/O direction control register
0: Set the relative I/O pins as output
1: Set the relative I/O pin into high impedance
Bit 2 ~7 Unused. Clear to ‘0’
Bit 1
0
Bit 0
IOC60
NOTE
Refer to Section 6.2.12, IOCE (Bit 5) Register on how to switch Port 6 to normal I/O port.
12 of 34 07.12.2004 (V1.0)
This specification is subject to change without further notice.
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