74F64SC 查看數據表（PDF） - Fairchild Semiconductor

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74F64SC

4-2-3-2-Input AND/OR Invert Gate

Fairchild Semiconductor 

April 1988

Revised March 1999

74F64

4-2-3-2-Input AND-OR-Invert Gate

General Description

This device contains gates configured to perform a 4-2-3-2

input AND-OR-INVERT function.

Ordering Code:

Order Number Package Number

Package Description

74F64SC

M14A

14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow

74F64SJ

M14D

14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

74F64PC

N14A

14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Logic Symbol

Connection Diagram

IEEE/IEC

Unit Loading/Fan Out

Pin Names

An, Bn, Cn, Dn

O

Description

Inputs

Output

U.L.

HIGH/LOW

1.0/1.0

50/33.3

Input IIH/IIL

Output IOH/IOL

20 µA/−0.6 mA

−1 mA/20 mA

© 1999 Fairchild Semiconductor Corporation DS009467.prf

www.fairchildsemi.com

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