1.6.2 Digital Audio Input Timing
1.6.2.1 AES/EBU Format Input
A 6.144MHz (128fs) audio clock must be supplied to the
ACLKA and ACLKB inputs. ACLKA is used to clock the
AES/EBU digital audio signal for channels 1 to 4 (AIN1/2
and AIN3/4) into the device. ACLKB is used to clock the
AES/EBU digital audio signal for channels 5 to 8 (AIN5/6
and AIN7/8) into the device. In AES/EBU input mode, the
WCINB and WCINB external pins should be grounded.
See Figure 20 for timing.
Y/Cb / Cr [19:0]
Audio Channels 1 & 2
Audio Channels 3 & 4
6.144MHz (128 fs)
Audio Channels 5 & 6
Audio Channels 7 & 8
6.144MHz (128 fs)
GS1503
VIN[19:0]
AIN1/2
AIN3/4
ACLKA
WCINA
AIN5/6
AIN7/8
ACLKB
WCINB
ACLKA/B
AIN1/2, AIN3/4
AIN5/6, AIN7/8
6.144MHz
Fig. 20 AES/EBU Input Configuration and Timing
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