5. Application Information
GS1524A Data Sheet
5.1 PCB Layout
Special attention must be paid to component layout when designing serial digital
interfaces for HDTV. An FR-4 dielectric can be used, however, controlled
impedance transmission lines are required for PCB traces longer than
approximately 1cm. Note the following PCB artwork features used to optimize
performance:
• PCB trace width for HD rate signals is closely matched to SMT component
width to minimize reflections due to change in trace impedance.
• The PCB ground plane is removed under the GS1524A input components to
minimize parasitic capacitance.
• The PCB ground plane is removed under the GS1524A output components to
minimize parasitic capacitance.
• High speed traces are curved to minimize impedance changes.
5.2 Typical Application Circuits
VCC
CLI
CD/MUTE
VCC
BNC
6.4n
75
10n
1u
1u
75
37.4
+
1u
GS1524A
1 CLI
2 VCC
3 VEE
4 SDI
5 SDI
6 VEE
7 AGC+
8 AGC-
CD/MUTE 16
VCC 15
VEE 14
SDO 13
SDO 12
VEE 11
MCLADJ 10
BYPASS 9
10n
+ 4u7
+
4u7
SDO
SDO
NOTE: All resistors in Ohms, capacitors in Farads,
and inductors in Henrys, unless otherwise noted.
Figure 5-1: GS1524A Typical Application Circuit
MCLADJ
BYPASS
28852 - 1 May 2005
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