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HD404314H 查看數據表(PDF) - Hitachi -> Renesas Electronics

零件编号
产品描述 (功能)
生产厂家
HD404314H
Hitachi
Hitachi -> Renesas Electronics Hitachi
HD404314H Datasheet PDF : 66 Pages
First Prev 61 62 63 64 65 66
HD404318 Series
Serial Interface Timing Characteristics (VCC = 4.0 to 5.5 V, GND = 0 V, Vdisp = VCC – 40 V to VCC, Ta =
–20 to +75°C, unless otherwise specified)
During Transmit Clock Output
Item
Symbol Pins
Transmit clock cycle time tScyc
Transmit clock high width tSCKH
Transmit clock low width tSCKL
Transmit clock rise time tSCKr
Transmit clock fall time tSCKf
Serial output data delay tDSO
time
SCK
SCK
SCK
SCK
SCK
SO
Serial input data setup tSSI
SI
time
Serial input data hold time tHSI
SI
Min Typ Max Unit Test Condition
Note
1—
0.4 —
0.4 —
——
— tcyc Load shown in figure 56 1
— tScyc Load shown in figure 56 1
— tScyc Load shown in figure 56 1
80 ns Load shown in figure 56 1
— — 80 ns Load shown in figure 56 1
— — 300 ns Load shown in figure 56 1
100 — — ns
1
200 — — ns
1
During Transmit Clock Input
Item
Symbol Pins
Transmit clock cycle time tScyc
Transmit clock high width tSCKH
Transmit clock low width tSCKL
Transmit clock rise time tSCKr
Transmit clock fall time tSCKf
Serial output data delay tDSO
time
SCK
SCK
SCK
SCK
SCK
SO
Serial input data setup tSSI
SI
time
Serial input data hold time tHSI
SI
Note: 1. Refer to figure 55.
Min Typ Max Unit Test Condition
Note
1
t cyc
1
0.4 —
t Scyc
1
0.4 —
t Scyc
1
— — 80 ns
1
— — 80 ns
1
— — 300 ns Load shown in figure 56 1
100 — — ns
1
200 — — ns
1
OSC1
1/fCP
VCC – 0.5 V
0.5 V
tCPH
tCPL
tCPr
tCPf
Figure 51 External Clock Timing
61

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