TTSI4K32T3BAL 查看數據表（PDF） - Agere -> LSI Corporation

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TTSI4K32T3BAL

4096-Channel, 32-Highway Time-Slot Interchanger

Agere -> LSI Corporation 

TTSI4K32T

4096-Channel, 32-Highway Time-Slot Interchanger

Data Sheet

June 2000

Mixed-Highway Data Rates

Each receive (Rx) highway can be selected to sample at a rate of either 2.048 Mbits/s, 4.096 Mbits/s, or

8.192 Mbits/s. This rate selection is made via the HDR[1—0] field in the receive highways configuration register

(byte 2). Similarly, each transmit (Tx) highway can be programmed to clock the data out at 2.048 Mbits/s,

4.096 Mbits/s, or 8.192 Mbits/s via the transmit highway configuration register (byte 2). Thus, 64 independent data

rate selections can be made: 32 on the Rx side and 32 on the Tx side. Highways can also be selected to be idle,

i.e., neither receiving nor transmitting data.

The data rate on a receive highway does not have to match that on its corresponding transmit highway either, e.g.,

RXD0 and TXD0 data rates can be different. Data received on a 2.048 Mbits/s highway can be transmitted on a

4.096 Mbits/s or 8.192 Mbits/s highway too. All of this flexibility allows this device to be used to solve a variety of

design problems such as data rate adaptation, etc. Many slow-speed highways can also be combined and sent out

on a single high-speed highway.

The figure below depicts an example where time slots are being received on different highways at different data

rates and are being switched and sent out at a slower, same, or faster data rate. Each rectangle, labeled A—N,

represents an 8-bit time slot.

FSYNC

RXD0 (2 Mbits/s)

A

RXD1 (4 Mbits/s)

C

D

RXD2 (8 Mbits/s)

GH I J

B

E

F

K LMN

TXD2 (2 Mbits/s)

TXD3 (4 Mbits/s)

TXD4 (8 Mbits/s)

G

D

A

J I CB

Figure 9. Mixed-Highway Data Rates

F

K

H

N EM L

5-7077(F)

20

Lucent Technologies Inc.

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