HT46R62 查看數據表（PDF） - Holtek Semiconductor

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HT46R62

A/D with LCD Type 8-Bit MCU

Holtek Semiconductor 

HT46R62/HT46C62

terrupt control bit are set both to 1 (if the stack is not full).

To return from the interrupt subroutine, ²RET² or ²RETI²

may be invoked. RETI sets the EMI bit and enables an

interrupt service, but RET does not.

Interrupts occurring in the interval between the rising

edges of two consecutive T2 pulses are serviced on the

latter of the two T2 pulses if the corresponding interrupts

are enabled. In the case of simultaneous requests, the

priorities in the following table apply. These can be

masked by resetting the EMI bit.

Interrupt Source

External interrupt 0

External interrupt 1

Timer/Event Counter overflow

Time base interrupt

Real time clock interrupt

Priority Vector

1

04H

2

08H

3

0CH

4

14H

5

18H

The Timer/Event Counter interrupt request flag (TF), ex-

ternal interrupt 1 request flag (EIF1), external interrupt 0

request flag (EIF0), enable Timer/Event Counter inter-

rupt bit (ETI), enable external interrupt 1 bit (EEI1), en-

able external interrupt 0 bit (EEI0) and enable master

interrupt bit (EMI) make up of the Interrupt Control regis-

ter 0 (INTC0) which is located at 0BH in the RAM. The

real time clock interrupt request flag (RTF), time base in-

terrupt request flag (TBF), enable real time clock inter-

rupt bit (ERTI), and enable time base interrupt bit

(ETBI), on the other hand, constitute the Interrupt Con-

trol register 1 (INTC1) which is located at 1EH in the

RAM. EMI, EEI0, EEI1, ETI, ET1I, ETBI and ERTI are all

used to control the enable/disable status of interrupts.

These bits prevent the requested interrupt from being

serviced. Once the interrupt request flags (RTF, TBF,

TF, EIF1, EIF0) are all set, they remain in the INTC1 or

INTC0 respectively until the interrupts are serviced or

cleared by a software instruction.

It is recommended that a program should not use the

²CALL subroutine² within the interrupt subroutine. It¢s be-

cause interrupts often occur in an unpredictable manner

or require to be serviced immediately in some applica-

tions. During that period, if only one stack is left, and en-

abling the interrupt is not well controlled, operation of

the ²call² in the interrupt subroutine may damage the

original control sequence.

Oscillator Configuration

The device provides three oscillator circuits for system

clocks, i.e., RC oscillator, crystal oscillator and 32768Hz

crystal oscillator, determined by options. No matter what

type of oscillator is selected, the signal is used for the

system clock. The HALT mode stops the system oscilla-

tor (RC and crystal oscillator only) and ignores external

signal in order to conserve power. The 32768Hz crystal

oscillator still runs at HALT mode. If the 32768Hz crystal

oscillator is selected as the system oscillator, the system

oscillator is not stopped; but the instruction execution is

stopped. Since the 32768Hz oscillator is also designed

for timing purposes, the internal timing (RTC, time base,

WDT) operation still runs even if the system enters the

HALT mode.

Of the three oscillators, if the RC oscillator is used, an

external resistor between OSC1 and VSS is required,

and the range of the resistance should be from 30kW to

750kW. The system clock, divided by 4, is available on

OSC2 with pull-high resistor, which can be used to syn-

chronize external logic. The RC oscillator provides the

most cost effective solution. However, the frequency of

the oscillation may vary with VDD, temperature, and the

chip itself due to process variations. It is therefore, not

suitable for timing sensitive operations where accurate

oscillator frequency is desired.

On the other hand, if the crystal oscillator is selected, a

crystal across OSC1 and OSC2 is needed to provide the

feedback and phase shift required for the oscillator, and

no other external components are required. A resonator

may be connected between OSC1 and OSC2 to replace

the crystal and to get a frequency reference, but two ex-

ternal capacitors in OSC1 and OSC2 are required.

There is another oscillator circuit designed for the real

time clock. In this case, only the 32.768kHz crystal oscil-

lator can be applied. The crystal should be connected

between OSC3 and OSC4.

O SC1

V DD

470pF

O SC1

O SC2

C r y s ta l O s c illa to r

fS Y S /4

O SC2

R C O s c illa to r

O SC3

O SC4

System Oscillator

32768H z

C r y s ta l/R T C

O s c illa to r

Note:

32768Hz crystal enable condition: For WDT

clock source or for system clock source.

The external resistor and capacitor components

connected to the 32768Hz crystal are not neces-

sary to provide oscillation. For applications

where precise RTC frequencies are essential,

these components may be required to provide

frequency compensation due to different crystal

manufacturing tolerances.

Rev. 1.60

12

July 14, 2005

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