DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

HT56R668 查看數據表(PDF) - Holtek Semiconductor

零件编号
产品描述 (功能)
生产厂家
HT56R668
Holtek
Holtek Semiconductor Holtek
HT56R668 Datasheet PDF : 104 Pages
First Prev 11 12 13 14 15 16 17 18 19 20 Next Last
HT56R67/HT56R668/HT56C668/HT56R678/HT56C678/HT56R688
General Purpose Data Memory
All microcontroller programs require an area of
read/write memory where temporary data can be stored
and retrieved for use later. It is this area of RAM memory
that is known as General Purpose Data Memory. This
area of Data Memory is fully accessible by the user pro-
gram for both read and write operations. By using the
²SET [m].i² and ²CLR [m].i² instructions individual bits
can be set or reset under program control giving the
user a large range of flexibility for bit manipulation in the
Data Memory. For devices with larger Data Memory ca-
pacities, the General Purpose Data Memory, in addition
to being located in Bank 0, is also stored in Banks 2 to
12, the actual number of banks present depends upon
the device selected.
Special Purpose Data Memory
This area of Data Memory is where registers, necessary
for the correct operation of the microcontroller, are
stored. Most of the registers are both read and write type
but some are protected and are read only, the details of
which are located under the relevant Special Function
Register section. Note that for locations that are unused,
any read instruction to these addresses will return the
unknow value. The Special Function registers are
mapped into all banks and can therefore be accessed
from any bank location.
Display Memory
The data to be displayed on the LCD or LED display is
stored in an area of fully accessible Data Memory. By
writing to this area of RAM, the display output can be di-
rectly controlled by the application program. As this
Memory exists in Bank 1, but have addresses which
map into the General Purpose Data Memory, it is neces-
sary to first ensure that the Bank Pointer is set to the
value ²01H² before accessing the Display Memory. The
Display Memory can only be accessed indirectly using
the Memory Pointer MP1 and the indirect addressing
register IAR1. When the Bank Pointer is set to Bank 1 to
access the Display Memory, if any addresses with a
value less than ²40H² are read, the Special Purpose
Memory in Bank 0 will be accessed. Also, if the Bank
Pointer is set to Bank 1, if any addresses higher than the
last address in Bank 1 are read, then a value of ²00H²
will be returned.
Special Function Registers
To ensure successful operation of the microcontroller,
certain internal registers are implemented in the Data
Memory area. These registers ensure correct operation
of internal functions such as timers, interrupts, etc., as
well as external functions such as I/O data control and
A/D converter operation. The location of these registers
within the Data Memory begins at the address ²00H².
Any unused Data Memory locations between these spe-
cial function registers and the point where the General
Purpose Memory begins is reserved for future expan-
sion purposes, attempting to read data from these loca-
tions will return a unknow value.
H T56R 67
H T 5 6 R 6 6 8 /H T 5 6 C 6 6 8
H T 5 6 R 6 7 8 /H T 5 6 C 6 7 8
H T56R 688
00H
IA R 0
01H
M P0
02H
IA R 1
03H
M P1
04H
BP
05H
ACC
06H
PCL
07H
TB LP
08H
TB LH
09H
R TC C
0A H
STATU S
0B H
IN T C 0
0C H
0D H
TM R 0
0E H
TM R 0C
0FH
TM R 1H
10H
TM R 1L
11H
TM R 1C
12H
PA
13H
PAC
14H
PB
15H
PBC
16H
PC
17H
PCC
18H
PD
19H
PDC
1A H
P W M 0L
1B H
P W M 0H
1C H
P W M 1L
1D H
P W M 1H
1E H
IN T C 1
1FH
20H
P W M 2L
21H
P W M 2H
22H
P W M 3L
23H
P W M 3H
24H
ADRL
25H
ADRH
26H
ADCR
27H
ACSR
28H
C LK M O D
29H
PAW U
2A H
PAPU
2B H
PBPU
2C H
PCPU
2D H
PDPU
2E H
IN T E D G E
2FH
30H
LC D C TR L
31H
LC D O U T1
32H
LC D O U T2
33H
M IS C
34H
M F IC 0
35H
M F IC 1
36H
S IM C T L 0
37H
S IM C T L 1
38H
S IM D R
39H
S IM A R /S IM C T L 2
3A H
TM R 2
3B H
TM R 2C
3C H
TM R 3
3D H
TM R 3C
3E H
3FH
IA R 0
M P0
IA R 1
M P1
BP
ACC
PCL
TB LP
TB LH
R TC C
STATU S
IN T C 0
TM R 0
TM R 0C
TM R 1H
TM R 1L
TM R 1C
PA
PAC
PB
PBC
PD
PDC
P W M 0L
P W M 0H
P W M 1L
P W M 1H
IN T C 1
P W M 2L
P W M 2H
P W M 3L
P W M 3H
ADRL
ADRH
ADCR
ACSR
C LK M O D
PAW U
PAPU
PBPU
PDPU
IN T E D G E
LE D C TR L
LC D C TR L
LC D O U T1
LC D O U T2
M IS C
M F IC 0
M F IC 1
S IM C T L 0
S IM C T L 1
S IM D R
S IM A R /S IM C T L 2
TM R 2
TM R 2C
TM R 3
TM R 3C
: U n u s e d R e a d a s "0 0 "
Special Purpose Data Memory
Rev. 1.60
20
May 21, 2012

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]