PC133-333-520 查看數據表（PDF） - Infineon Technologies

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PC133-333-520

3.3 V 16M x 64/72-Bit 1 Bank 128MByte SDRAM Module 3.3 V 32M x 64/72-Bit 2 Bank 256MByte SDRAM Module 168-Pin Unbuffered DIMM Modules

Infineon Technologies 

HYS 64/72V16300/32220GU

SDRAM-Modules

Byte#

Description

29 Minimum RAS to CAS delay

tRCD

30 Minimum RAS pulse width

tRAS

31 Module Bank Density (per

bank)

32 SDRAM input setup time

33 SDRAM input hold time

34 SDRAM data input hold time

35 SDRAM data input setup

time

62-61 Superset information (may be

used in future)

62 SPD Revision

63 Checksum for bytes 0 - 62

64- Manufacturers information

125

126 Frequency Specification

127 Support Details

128+ Unused storage locations

SPD Entry

Value

20 ns

45 ns

128 MByte

1.5 ns

0.8 ns

1.5 ns

0.8 ns

Revision 1.2

Hex

16Mx64 16Mx72 32Mx64 32Mx72

-7.5

-7.5

-7.5

-7.5

14

2D

20

15

08

15

08

FF

12

13

25

14

26

XX

XX

XX

XX

64

AF

FF

FF

INFINEON Technologies

15

9.01

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