IC42S32200L-8T 查看數據表（PDF） - Integrated Circuit Systems

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IC42S32200L-8T

512K Words x 32 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM

Integrated Circuit Systems 

IC42S32200

IC42S32200L

7 Mode Register Set command

(RAS#=”L”,CAS#=”L”,WE#=”L”,BS0,1 and A10-A0 =Register Data)

The mode register stores the data for controlling the various operating modes of SDRAM.The Mode Regis-

ter Set command programs the values of CAS#latency,Addressing Mode and Burst Length in the Mode register

to make SDRAM useful for a variety of different applications.The default values of the Mode Register after power-

up are undefined;therefore this command must be issued at the power-up sequence.The state of pins BS0,1 and

A10~A0 in the same cycle is the data written to the mode register.One clock cycle is required to complete the write

in the mode register (refer to the following figure).The contents of the mode register can be changed using the

same command and the clock cycle requirements during operation as long as all banks are in the idle state.

Integrated Circuit Solution Inc.

15

DR036-0D 02/04/2005

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