IP100A 查看數據表（PDF） - Unspecified

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IP100A

Integrated 10/100 Ethernet MAC + PHY

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IP100A LF

Preliminary Data Sheet

4 Acronyms and Glossary

LAN

Local Area Network

MAC

Media Access Control Layer, or a device implementing the functions of this layer (a Media

Access Controller)

PCI

Peripheral Component Interface

NIC

Network Interface Cards

FIFO

First In First Out

EPROM Erasable Programmable Read Only Memory

EEPROM Electrically Erasable Programmable Read Only Memory

LED

Light Emitting Diode

PHY

Physical Layer, or device implementing functions of the Physical Layer

CSMA/CD Carrier Sense Multiple Access with Collision Detect

FCS

Frame Check Sequence

SFD

Start of Frame Delimiter

CRC

Cyclic Redundancy Check

IP

Internet Protocol

TFD

Transmit Frame Descriptor

RFD

Receive Frame Descriptor

DMA

Direct Memory Access

ACPI Advanced Configuration and Power Management

5 Standards Compliance

The IP100A LF implements functionality compliant with the following standards:

• IEEE 802.3 Fast Ethernet

• IEEE 802.3 Full Duplex Flow Control

• PCI Local Bus Revision 2.2

• PCI Bus Power Management Interface Revision 1.1

• ACPI Revision 1.0

6 Functional Description

The IP100A LF is composed of various functional blocks as shown in Figure 1 on page 2. An overview of

the functions performed by each block are as follows:

6.1 Media Access Control

The MAC block implements the IEEE Ethernet 802.3 Media Access Control functions with 802.3 Full

Duplex and Flow Control enhancements. In half duplex mode, the MAC implements the CSMA/CD

algorithm. Full duplex mode by definition does not utilize CSMA/CD, allowing data to be transmitted on

demand. An optional flow control mechanism in full duplex mode is provided via the MAC Control PAUSE

function. Additionally, the MAC also performs the following functions in either half or full duplex mode:

• Optional transmit FCS generation

• Padding to the minimum legal frame size

• Preamble and SFD generation

• Preamble and SFD removal

• Receive frame FCS checking and optional FCS stripping

• Receive frame destination address matching

• Support for multicast and broadcast frame reception or rejection (via filtering)

• Selective InterFrame Gap to avoid capture effect

• MAC Loopback

The MAC is responsible for generation of hardware signals to update the internal statistics counters.

Copyright © 2004, IC Plus Corp.

13/97

March. 30, 2007

IP100A LF-DS-R17

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