IR1150S 查看數據表（PDF） - International Rectifier
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IR1150S Datasheet PDF : 16 Pages
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IR1150S/IR1150IS(PbF)
General Description
The µPFC IR1150 is intended for boost converters
for power factor correction operating at a fixed
frequency in continuous conduction mode. The IC
operates with two loops; an inner current loop and
an outer voltage loop. The inner current loop is fast,
reliable and does not require sensing of the input
voltage in order to create a current reference.
This inner current loop sustains the sinusoidal profile
of the average input current based on the dependency
of the pulse width modulator duty cycle on the input
line voltage in order to determine the analogous input
line current. Thus, the current loop uses the
embedded input voltage signal to control the average
input current to follow the input voltage.
The IR1150 enables excellent THD performance. In
light load conditions, a small distortion occurs at zero-
crossing due to the finite boost inductance but this is
negligible and well within EN61000-3-2 Class D
specifications.
The outer voltage loop controls the DC bus voltage.
This voltage is fed into the voltage error amplifier to
control the slope of the integrator ramp and sets the
amplitude of the average input current.
The two loops combine to control the amplitude,
phase and shape of the input current, with respect to
the input voltage, giving near-unity power factor.
The IC is designed for robust operation and pro-
vides protection from system level over current, over
voltage, under voltage, and brownout conditions.
IC Supply
The UVLO circuit monitors the VCC pin and maintains
the gate drive signal inactive until the VCC pin voltage
reaches the UVLO turn on threshold, (VCC ON). As soon
as the VCC voltage exceeds this threshold, provided
that the VFB pin voltage is greater than 20%VREF, the
gate drive will begin switching (under Soft Start) and
increase the pulse width to its maximum value as
demanded by the output voltage error amplifier. If
the voltage on the VCC pin falls below the UVLO turn
off threshold, (VCC UVLO), the IC turns off, gate drive is
terminated, and the turn on threshold must again be
exceeded in order to re-start the process and move
into Soft Start mode.
Soft Start
Soft Start controls the rate of rise of the output voltage
error amplifier in order to obtain a linear control of
the increasing duty cycle as a function of time. The
Soft Start time is controlled by voltage error amplifier
compensation components selected, and is user
programmable based on desired loop crossover
frequency.
Frequency Select
The switching frequency of the IC is programmable
by an external resistor at the FREQ pin. The design
incorporates min/max restrictions such that the
minimum and maximum operating frequency fall
within the range of 50-200kHz.
Gate Drive
The gate drive is a totem pole driver with 1.5A
capability. If higher currents are required, additional
external drivers can be used.
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