KS0072 查看數據表（PDF） - Samsung

零件编号

产品描述 (功能)

生产厂家

KS0072

DOT MATRIX LCD CONTROLLER & DRIVER

Samsung 

KS0072

PRELIMINARY SPECIFICATION

DOT MATRIX LCD CONTROLLER & DRIVER

10) Read Busy Flag & Address

RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0

Code 0

0

BF AC6 AC5 AC4 AC3 AC2 AC1 AC0 DDRAM

MSB

LSB

RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0

Code 0

0

BF

*

* AC4 AC3 AC2 AC1 AC0 CGRAM

MSB

LSB

This instruction shows whether KS0072 is in internal operation or not. If the resultant BF is High, The internal

operation is in progress and should wait until BF to be Low, which by then the next instruction can

be performed.

In the instruction you can read also the value of address counter.

11) Write data to RAM

RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0

Code 1

0

D7 D6 D5 D4 D3 D2 D1 D0 (DDRAM)

MSB

LSB

RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0

Code 1

0

*

*

*

D4 D3 D2 D1 D0 (CGRAM)

MSB

LSB

“*” : Don’t care

Write binary 8/5 bit data to DDRAM/CGRAM.

The selection of RAM from DDRAM/CGRAM is set by the previous address set instruction (DDRAM address

set, CGRAM address set).

After writing operation, the address is automatically increased/decreased by 1, according to the entry mode.

12) Read data from RAM

RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0

Code 1

0

D7 D6 D5 D4 D3 D2 D1 D0 (DDRAM)

MSB

LSB

RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0

Code 1

0

*

*

*

D4 D3 D2 D1 D0 (CGRAM)

MSB

LSB

“*” : Don’t care

Read bINARY 8/5 bit from DDRAM/CGRAM.

LDI-97-D001

16

97-10-23

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