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LA76850 查看數據表(PDF) - SANYO -> Panasonic

零件编号
产品描述 (功能)
生产厂家
LA76850
SANYO
SANYO -> Panasonic SANYO
LA76850 Datasheet PDF : 31 Pages
First Prev 31
LA76850
Read Status Description
RF.AGC
0: RF AGC = low, 1: RF AGC = high. See the separately provided documentation (Application Note) for details.
IF.LOCK
0: IF.PLL = Locked, 1: IF.PLL = Unlocked
V.TRI
Returns the output of the VCD internal vertical trigger detection circuit to the bus. The state of the internal memory is updated every vertical
period.
1HEX: Detected
50/60
Returns the output of the VCD internal 50/60 Hz detection output to the bus.
ST/NONST Returns to the bus whether a standard (262.5H) VCD or a nonstandard internal vertical trigger detection circuit output VCD is used.
Returns the FF output determined by the VCD internal mode in real time.
1HEX: Standard
H.Lock
Performs FBP and Hsync phase detection, integrates that output, and detects at a point about 40H after the HVCO locks.
Returns, in real time, the state with respect to bus reads.
1Hex: Locked
Specifications of any and all SANYO Semiconductor products described or contained herein stipulate the
performance, characteristics, and functions of the described products in the independent state, and are
not guarantees of the performance, characteristics, and functions of the described products as mounted
in the customer's products or equipment. To verify symptoms and states that cannot be evaluated in an
independent device, the customer should always evaluate and test devices mounted in the customer's
products or equipment.
SANYO Semiconductor Co., Ltd. strives to supply high-quality high-reliability products. However, any
and all semiconductor products fail with some probability. It is possible that these probabilistic failures
could give rise to accidents or events that could endanger human lives, that could give rise to smoke or
fire, or that could cause damage to other property. When designing equipment, adopt safety measures
so that these kinds of accidents or events cannot occur. Such measures include but are not limited to
protective circuits and error prevention circuits for safe design, redundant design, and structural design.
In the event that any or all SANYO Semiconductor products (including technical data,services) described
or contained herein are controlled under any of applicable local export control laws and regulations, such
products must not be exported without obtaining the export license from the authorities concerned in
accordance with the above law.
No part of this publication may be reproduced or transmitted in any form or by any means, electronic or
mechanical, including photocopying and recording, or any information storage or retrieval system, or
otherwise, without the prior written permission of SANYO Semiconductor Co., Ltd.
Any and all information described or contained herein are subject to change without notice due to
product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification"
for the SANYO Semiconductor product that you intend to use.
Information (including circuit diagrams and circuit parameters) herein is for example only; it is not
guaranteed for volume production. SANYO Semiconductor believes information herein is accurate and
reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual
Thpirsocpaetratylorgigphrtosvoidreosthinefrorrimghattsioonf athsirodf pNaorvtieems.ber, 2005. Specifications and information herein are subject to
Thcihsacnagtaelowgithporouvtidneosticinef.ormation as of November, 2005. Specifications and information herein are subject
to change without notice.
PS NoA0017-31/31

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