LC723461W 查看數據表（PDF） - SANYO -> Panasonic

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LC723461W

Ultralow-Voltage ETR Controller with On-Chip LCD Driver

SANYO -> Panasonic 

Block Diagram

LC723461W, 723462W

XIN

XOUT

FMIN

AMIN

VSS

VDC3

VADJ

VDC1

HCTR

RES

COMC

TEST1

PA0

PA1

PA2

PA3

PB0

PB1

PB2

PB3

PC0

PC1

PC2

PC3

INT0/PD0

INT1/PD1

PD2

PD3

SCK1/PK1

SO1/PK2

SI1/PK3

DIVIDER

SYSTEM CLOCK

GENERATOR

1/2

1/16,1/17

REFERENCE DIVIDER

PROGRAMMBLE DIVIDER

PHASE

DETECTOR

EO

1/2 1/8

Clock Control

1/2

*

P-ON

RESET

BUS

DRIVER

* DATA

LATCH

/

BUS

DRIVER

DATA

LATCH

/

BUS

DRIVER

DATA

LATCH

/

BUS

DRIVER

DATA

LATCH

/

BUS

DRIVER

SIO

PLL DATA LATCH

PLL CONTROL

LCDA/B

S1

UNIVERSAL

COUNTER

(20bits)

SEG

4 LA 7

LCPA/B

LCD

80 PORT

DRIVER

RAM

256×4bits

(LC723461)

512×4bits

(LC723462)

ADDRESS

DECODER

BANK

ROM

4k×16bits

(LC723461)

6K×16bits

(LC723462)

BUS

CONTROL

INSTRUCTION

DECODER

ADDRESS DECODER

SKIP

14

ADDRESS COUNTER

14

STACK

JMP

CAL

RETURN

INTERRUPT

RESET

BANK CF

LATCH

A

ALU

LATCH

B

TIMER 0

JUDGE

MPX

(6bits)

DATA BUS

DATA

LATCH

/

BUS

DRIVER

DATA

LATCH

/

BUS

DRIVER

BEEP TONE

DATA

LATCH

MPX

/

BUS

MPX

DRIVER

DAC

MPX

DATA

LATCH

/

BUS

DRIVER

S12

S13/PH0

S14/PH1

S15/PH2

S16/PH3

S17/PG0

S18/PG1

S19/PG2

S20/PG3

PE0/BEEP

PE1/DAC

VDD

PF0/ADI0

PF1/ADI1

PF2/ADI3

No. 7275-6/13

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