LP8051AHP 查看數據表（PDF） - Intel

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LP8051AHP

MCS® 51 8-BIT CONTROL-ORIENTED MICROCONTROLLERS

Intel 

M=” 51 CONTROLLER

SERIAL PORT TIMING—SHIFT

Test Conditions: Over ODeratina Conditions: Load Capacitance = 80 rJF

Symbol

Parameter

12 MHz Oscillator

Min Max

VariableOscillator

Min

Max

Unite

TXLXL Serial Port Clock Cycle Time

1.0

12TCLCL

ps

TQVXH Output Data Setup to Clock Rising 700

1OTCLCL– 133

ns

Edge

TXHQX Output Data Hold after Clock

50

2TCLCL–1 17

ns

Rising Edge

TXHDX Input Data Hold after Clock Rising

o

0

ns

Edge

TXHDV Clock Rising Edge to Input Data

700

Valid

10TCLCL– 133 ns

;HI17REGISTERMODETIMINGWAVEFORMS

INSTRUCTION I

OI

1

I

2

I

3

I

4

I

5

I

6

I

7

I

8

I

ALE n n n n n n n n n n n n n n n n n n I

CLOCK

I-TXLXL-7

OUTPUT OATA

,

INPUT DATA

~

WI-TXHQX I

o 1)(

1

2x

3x

4x

5x

6x

7/

+

SET TI

4

SET RI

272318-8

12

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