LM3S817-IRN25-A2 查看數據表（PDF） - Unspecified
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LM3S817-IRN25-A2 Datasheet PDF : 379 Pages
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LM3S817 Data Sheet
Register 14:
Register 15:
Register 16:
Register 17:
Register 18:
Register 19:
Register 20:
Register 21:
SSI Peripheral Identification 0 (SSIPeriphID0), offset 0xFE0.................................................. 301
SSI Peripheral Identification 1 (SSIPeriphID1), offset 0xFE4.................................................. 302
SSI Peripheral Identification 2 (SSIPeriphID2), offset 0xFE8.................................................. 303
SSI Peripheral Identification 3 (SSIPeriphID3), offset 0xFEC ................................................. 304
SSI PrimeCell Identification 0 (SSIPCellID0), offset 0xFF0..................................................... 305
SSI PrimeCell Identification 1 (SSIPCellID1), offset 0xFF4..................................................... 306
SSI PrimeCell Identification 2 (SSIPCellID2), offset 0xFF8..................................................... 307
SSI PrimeCell Identification 3 (SSIPCellID3), offset 0xFFC .................................................... 308
Analog Comparator ...................................................................................................................... 309
Register 1: Analog Comparator Masked Interrupt Status (ACMIS), offset 0x00........................................ 313
Register 2: Analog Comparator Raw Interrupt Status (ACRIS), offset 0x04.............................................. 314
Register 3: Analog Comparator Interrupt Enable (ACINTEN), offset 0x08 ................................................ 315
Register 4: Analog Comparator Reference Voltage Control (ACREFCTL), offset 0x10 ............................ 316
Register 5: Analog Comparator Status 0 (ACSTAT0), offset 0x20 ............................................................ 317
Register 6: Analog Comparator Control 0 (ACCTL0), offset 0x24 ............................................................. 318
Pulse Width Modulator (PWM)..................................................................................................... 320
Register 1: PWM Master Control (PWMCTL), offset 0x000....................................................................... 326
Register 2: PWM Time Base Sync (PWMSYNC), offset 0x004................................................................. 327
Register 3: PWM Output Enable (PWMENABLE), offset 0x008................................................................ 328
Register 4: PWM Output Inversion (PWMINVERT), offset 0x00C............................................................. 329
Register 5: PWM Output Fault (PWMFAULT), offset 0x010...................................................................... 330
Register 6: PWM Interrupt Enable (PWMINTEN), offset 0x014................................................................. 331
Register 7: PWM Raw Interrupt Status (PWMRIS), offset 0x018 .............................................................. 332
Register 8: PWM Interrupt Status and Clear (PWMISC), offset 0x01C ..................................................... 333
Register 9: PWM Status (PWMSTATUS), offset 0x020............................................................................. 334
Register 10: PWM0 Control (PWM0CTL), offset 0x040............................................................................... 335
Register 11: PWM0 Interrupt Enable (PWM0INTEN), offset 0x044............................................................. 336
Register 12: PWM0 Raw Interrupt Status (PWM0RIS), offset 0x048 .......................................................... 337
Register 13: PWM0 Interrupt Status and Clear (PWM0ISC), offset 0x04C ................................................. 338
Register 14: PWM0 Load (PWM0LOAD), offset 0x050 ............................................................................... 339
Register 15: PWM0 Counter (PWM0COUNT), offset 0x054 ....................................................................... 340
Register 16: PWM0 Compare A (PWM0CMPA), offset 0x058 .................................................................... 341
Register 17: PWM0 Compare B (PWM0CMPB), offset 0x05C.................................................................... 342
Register 18: PWM0 Generator A Control (PWM0GENA), offset 0x060....................................................... 343
Register 19: PWM0 Generator B Control (PWM0GENB), offset 0x064....................................................... 345
Register 20: PWM0 Dead-Band Control (PWM0DBCTL), offset 0x068 ...................................................... 346
Register 21: PWM0 Dead-Band Rising-Edge Delay (PWM0DBRISE), offset 0x06C .................................. 347
Register 22: PWM0 Dead-Band Falling-Edge-Delay (PWM0DBFALL), offset 0x070.................................. 348
Pin Diagram ................................................................................................................................... 349
Signal Tables................................................................................................................................. 350
Operating Characteristics ............................................................................................................ 360
Electrical Characteristics ............................................................................................................. 361
Package Information .................................................................................................................... 373
May 4, 2007
15
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