LT1913IDD 查看數據表（PDF） - Linear Technology
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LT1913IDD Datasheet PDF : 24 Pages
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LT1913
APPLICATIONS INFORMATION
to prevent this overshoot. Figure 9 shows the waveforms
that result when an LT1913 circuit is connected to a 24V
supply through six feet of 24-gauge twisted pair. The
first plot is the response with a 4.7μF ceramic capacitor
at the input. The input voltage rings as high as 50V and
the input current peaks at 26A. A good solution is shown
in Figure 9b. A 0.7 resistor is added in series with the
input to eliminate the voltage overshoot (it also reduces
the peak input current). A 0.1μF capacitor improves high
frequency filtering. For high input voltages its impact on
efficiency is minor, reducing efficiency by 1.5 percent for
a 5V output at full load operating from 24V.
High Temperature Considerations
The PCB must provide heat sinking to keep the LT1913
cool. The Exposed Pad on the bottom of the package must
be soldered to a ground plane. This ground should be tied
to large copper layers below with thermal vias; these lay-
ers will spread the heat dissipated by the LT1913. Place
additional vias can reduce thermal resistance further. With
these steps, the thermal resistance from die (or junction)
to ambient can be reduced to JA = 35°C/W or less. With
100 LFPM airflow, this resistance can fall by another 25%.
Further increases in airflow will lead to lower thermal re-
18
CLOSING SWITCH
SIMULATES HOT PLUG
IIN VIN
LT1913
+
4.7μF
VIN
20V/DIV
LOW
IMPEDANCE
ENERGIZED
24V SUPPLY
STRAY
INDUCTANCE
DUE TO 6 FEET
(2 METERS) OF
TWISTED PAIR
IIN
10A/DIV
(9a)
0.7Ω
LT1913
VIN
20V/DIV
+
0.1μF
4.7μF
IIN
10A/DIV
(9b)
DANGER
RINGING VIN MAY EXCEED
ABSOLUTE MAXIMUM RATING
20μs/DIV
20μs/DIV
+
22μF +
35V
AI.EI.
LT1913
4.7μF
VIN
20V/DIV
IIN
10A/DIV
(9c)
20μs/DIV
1913 F09
Figure 9. A Well Chosen Input Network Prevents Input Voltage Overshoot and
Ensures Reliable Operation when the LT1913 is Connected to a Live Supply
1913f
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