LCX020BK 查看數據表（PDF） - Sony Semiconductor

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LCX020BK

1.8cm (0.7-inch) Color LCD Panel

Sony Semiconductor 

LCX020BK

3. 18-dot Simultaneous Sampling

The horizontal shift register performs SIGR1 to SIGR6, SIGG1 to SIGG6 and SIGB1 to SIGB6 signal sampling

simultaneously, which requires phase matching between each signal to prevent the horizontal resolution from

deteriorating. Phase matching by an external signal delaying circuit is needed before applying video signals to

the LCD panel.

The block diagram of the delaying procedure using the sample-and-hold method is as follows. The following

phase relationship diagram indicates the phase setting for right-direction scanning (RGT = High level). For left-

direction scanning (RGT = Low level), the phase settings should be inverted for the SIGR1 to SIGR6, SIGG1 to

SIGG6 and SIGB1 to SIGB6 signals.

SIGR1, SIGG1, SIGB1

S/H

S/H

SIGR2, SIGG2, SIGB2

CK1 S/H

S/H

CK2

SIGR3, SIGG3, SIGB3

S/H

S/H

SIGR4, SIGG4, SIGB4

SIGR5, SIGG5, SIGB5

CK3 S/H

S/H

CK4

S/H

S/H

SIGR6, SIGG6, SIGB6

CK5

S/H

CK6

SIGR1, SIGG1, SIGB1

SIGR2, SIGG2, SIGB2

SIGR3, SIGG3, SIGB3

SIGR4, SIGG4, SIGB4

SIGR5, SIGG5, SIGB5

SIGR6, SIGG6, SIGB6

<Phase relationship of delaying sample-and-hold pulses> (right-direction scanning)

HCKn

CK1

CK2

CK3

CK4

CK5

CK6

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