LTC1530IS8-1.9 查看數據表（PDF） - Linear Technology

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LTC1530IS8-1.9

High Power Synchronous Switching Regulator Controller

Linear Technology 

LTC1530

APPLICATIO S I FOR ATIO

Typically, thermal shutdown is activated if the LTC1530’s

junction temperature exceeds 150°C. G1 and G2 resume

switching when the junction temperature drops below

100°C.

Soft-Start and Current Limit

Unlike other PWM parts, the LTC1530 includes an on-chip

soft-start capacitor that is used during start-up and cur-

rent limit operation. On power-up, an internal 4µA pull-up

at COMP brings the LTC1530 out of shutdown mode. An

internal current source then charges the internal CSS

capacitor. The COMP pin is clamped to one VGS above the

voltage on CSS during start-up. This prevents the error

amplifier from forcing the loop to maximum duty cycle.

The LTC1530 operates at low duty cycle as the COMP pin

voltage increases above about 2.4V. The slew rate of the

soft-start capacitor is typically 0.4V/ms. As the voltage on

CSS continues to increase, MSS eventually turns off and the

error amplifier regulates the output. The MIN comparator

is disabled if soft-start is active to prevent an override of

the soft-start function.

The LTC1530 includes another feedback loop to control

operation in current limit. Before each falling edge of G1,

the current comparator, CC, samples and holds the volt-

age drop across external MOSFET Q1 with the LTC1530’s

IFB pin. CC compares the voltage at IFB to the voltage at the

IMAX pin. As peak current rises, the voltage across the

RDS(ON) of Q1 increases. If the voltage at IFB drops below

IMAX, indicating that Q1’s drain current has exceeded the

maximum desired level, CC pulls current out of CSS. Duty

cycle decreases and the output current is controlled. The

CC comparator pulls current out of CSS in proportion to the

voltage difference between IFB and IMAX. Under minor

overload conditions, the voltage at CSS falls gradually,

creating a time delay before current limit activates. Very

short, mild overloads may not affect the output voltage at

all. Significant overload conditions allow the voltage on

CSS to reach a steady state and the output remains at a

reduced voltage until the overload is removed. Serious

overloads generate a large overdrive and allow CC to pull

the CSS voltage down quickly, thus preventing damage to

the external components.

By using the RDS(ON) of Q1 to measure output current, the

current limit circuit eliminates the sense resistor that

would otherwise be required. This minimizes the number

of components in the high current power path. The current

limit circuitry is not designed to be highly accurate. It is

primarily meant to prevent damage to the power supply

circuitry during fault conditions. The exact current level

where current limiting takes effect will vary from unit to

unit as the RDS(ON) of Q1 varies.

Figure 5a illustrates the basic connections for the current

limit circuitry. For a given current limit level, the external

resistor from IMAX to VIN is determined by:

( ) RIMAX =

ILMAX RDS(ON)Q1

IIMAX

where,

ILMAX

=

ILOAD

+

IRIPPLE

2

ILOAD = Maximum load current

IRIPPLE = Inductor ripple current

( )( ) = VIN − VOUT VOUT

( )( )( ) fOSC LO VIN

fOSC = LTC1530 oscillator frequency = 300kHz

LO = Inductor value

RDS(ON)Q1 = On-resistance of Q1 at ILMAX

IIMAX = 200µA sink current

VIN

LTC1530

+

CC

–

200µA

IMAX RIMAX

G1

IFB

20Ω

G2

+

Q1

LO

+

Q2

CIN

VOUT

COUT

1530 F05

Figure 5a. Current Limit Setting (Use Kelvin-Sense

Connections Directly at the Drain and Source of Q1)

9

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