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AD7468BRM-REEL 查看數據表(PDF) - Analog Devices

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AD7468BRM-REEL Datasheet PDF : 28 Pages
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AD7466/AD7467/AD7468
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
VDD 1
GND 2
VIN 3
AD7466/
AD7467/
AD7468
TOP VIEW
(Not to Scale)
6 CS
5 SDATA
4 SCLK
Figure 4. SOT-23 Pin Configuration
CS 1
SDATA 2
SCLK 3
AD7466/
AD7467/
AD7468
8 VDD
7 GND
6 VIN
NC 4 TOP VIEW 5 NC
(Not to Scale)
NC = NO CONNECT
Figure 5. MSOP Pin Configuration
Table 6. Pin Function Descriptions
Pin No.
SOT-23 MSOP Mnemonic Description
6
1
CS
Chip Select. Active low logic input. This input provides the dual function of initiating conversions on the
devices and frames the serial data transfer.
1
8
VDD
Power Supply Input. The VDD range for the devices is from 1.6 V to 3.6 V.
2
7
GND
Analog Ground. Ground reference point for all circuitry on the devices. All analog input signals should
be referred to this GND voltage.
3
6
VIN
Analog Input. Single-ended analog input channel. The input range is 0 V to VDD.
5
2
SDATA
Data Out. Logic output. The conversion result from the AD7466/AD7467/AD7468 is provided on this
output as a serial data stream. The bits are clocked out on the falling edge of the SCLK input. The data
stream from the AD7466 consists of four leading zeros followed by the 12 bits of conversion data,
provided MSB first. The data stream from the AD7467 consists of four leading zeros followed by the 10
bits of conversion data, provided MSB first. The data stream from the AD7468 consists of four leading
zeros followed by the 8 bits of conversion data, provided MSB first.
4
3
SCLK
Serial Clock. Logic input. SCLK provides the serial clock for accessing data from the parts. This clock
input is also used as the clock source for the conversion process of the parts.
4, 5
NC
No Connect.
Rev. C | Page 12 of 28

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