M41T82(2008) 查看數據表（PDF） - STMicroelectronics

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M41T82
(Rev.:2008)

Serial I2C bus RTC with battery switchover

STMicroelectronics 

M41T82 M41T83

Operation

2.3

Write mode

In this mode the master transmitter transmits to the M41T8x slave receiver. Bus protocol is

shown in Figure 15. Following the START condition and slave address, a logic '0' (R/W = 0)

is placed on the bus and indicates to the addressed device that word address “An” will follow

and is to be written to the on-chip address pointer. The data word to be written to the

memory is strobed in next and the internal address pointer is incremented to the next

address location on the reception of an acknowledge clock. The M41T8x slave receiver will

send an acknowledge clock to the master transmitter after it has received the slave address

see Figure 12 on page 17 and again after it has received the word address and each data

byte.

Figure 15. Write mode sequence

BUS ACTIVITY:

MASTER

SDA LINE

S

WORD

ADDRESS (An)

DATA n

BUS ACTIVITY:

SLAVE

ADDRESS

DATA n+1

DATA n+X P

AI00591

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