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M41T83 查看數據表(PDF) - STMicroelectronics

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M41T83
ST-Microelectronics
STMicroelectronics ST-Microelectronics
M41T83 Datasheet PDF : 58 Pages
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Clock operation
M41T82 M41T83
3.2
Clock/control register map
The M41T8x offers 32 internal registers which contain clock, calibration (digital and analog),
Alarm 1 and 2, Watchdog, Flags, Timer, and Square Wave (M41T83 only). The clock
registers are memory locations which contain external (user accessible) and internal copies
of the data (usually referred to as BiPORT™ TIMEKEEPER® cells). The external copies are
independent of internal functions except that they are updated periodically by the
simultaneous transfer of the incremented internal copy. The internal divider (or clock) chain
will be reset upon the completion of a WRITE to any clock address (00h to 07h). The
system-to-user transfer of clock data will be halted whenever the address being read is a
clock address (00h to 07h). The update will resume either due to a Stop Condition or when
the pointer increments to a non-clock address. Clock and alarm registers store data in BCD
format. Calibration, Timer, Watchdog, and Square Wave bits are written in a binary format.
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