AD1377JD(RevD) 查看數據表（PDF） - Analog Devices

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AD1377JD
(Rev.:RevD)

Complete, High Speed 16-Bit A/D Converters

Analog Devices 

AD1376/AD1377

AD1376JD/AD1377JD

AD1376KD/AD1377KD

Model

Min Typ

Max Min Typ

Max

DRIFT6

Gain

±15

±5

±15

Offset

Unipolar

±2

±4

±2

±4

Bipolar

±10

±3

±10

Linearity

±2

±3

±0.3

±2

Guaranteed No Missing Code

Temperature Range

0 to 70 (13 Bits)

0 to 70 (14 Bits)

DIGITAL OUTPUT1

(All Codes Complementary)

Parallel Output Codes7

Unipolar

Bipolar

CSB

COB, CTC8

CSB

COB, CTC8

Output Drive

5

5

Status

Logic 1 During

Conversion

Logic 1 During

Conversion

Status Output Drive

Internal Clock9

5

5

Clock Output Drive

5

5

Frequency

1040/1750

1040/1750

TEMPERATURE RANGE

Specification

0 to 70

0 to 70

Operating

−25 to +85

−25 to +85

Storage

−55 to +125

−55 to +125

1 Logic 0 = 0.8 V max; Logic 1 = 2.0 V min for inputs. For digital outputs, Logic 0 = 0.4 V max. Logic 1 = 2.4 V min.

2 Tested on ±10 V and 0 V to +10 V ranges.

3 Adjustable to zero.

4 Full-scale range.

5 Conversion time may be shortened with “short cycle” set for lower resolution.

6 Guaranteed but not 100% production tested.

7 CSB–Complementary Straight Binary. COB–Complementary Offset Binary. CTC–Complementary Twos Complement.

8 CTC coding obtained by inverting MSB (Pin 1).

9 With Pin 23, clock rate controls tied to digital ground.

Unit

ppm/°C

ppm of FSR/°C

ppm of FSR/°C

ppm of FSR/°C

°C

LSTTL Loads

LSTTL Loads

LSTTL Loads

kHz

°C

°C

°C

Rev. D | Page 4 of 12

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