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C68HC11KA4BCFU4 查看數據表(PDF) - Motorola => Freescale

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C68HC11KA4BCFU4
Motorola
Motorola => Freescale Motorola
C68HC11KA4BCFU4 Datasheet PDF : 68 Pages
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XDV[1:0] — XOUT Clock Divide Select
These two bits control the frequency of the clock that is driven out the XOUT pin. The CLKX bit in the
CONFIG register controls whether this clock is on or off. When a clock rate is selected, allow a maxi-
mum of 16 cycles for stabilization. During reset a frequency of EXTAL is output. This frequency can be
divided after reset. Note that the phase relationship between the 4XDV1 signal and both EXTAL and E
cannot be predicted. Refer to the following table for further information about XOUT frequencies.
XDV[1:0]
0
0
0
1
1
0
1
1
XDV[1:0]
0
0
0
1
1
0
1
1
EXTAL
Divided By
1
4
6
8
EXTAL
Divided By
1
4
6
8
Table 5 XOUT Frequencies
Frequency at
EXTAL = 8 MHz
8 MHz
2 MHz
1.33 MHz
1 MHz
Frequency at
EXTAL = 8.4 MHz
8.4 MHz
2.1 MHz
1.4 MHz
1.05 MHz
Frequency at
EXTAL = 12 MHz
12 MHz
3 MHz
2 MHz
1.5 MHz
Frequency at
EXTAL = 12.6 MHz
12.6 MHz
3.15 MHz
2.1 MHz
1.57 MHz
Frequency at
EXTAL = 16 MHz
16 MHz
4 MHz
2.7 MHz
2 MHz
Frequency at
EXTAL = 16.8 MHz
16.8 MHz
4.2 MHz
2.8 MHz
2.1 MHz
NOTE
The XOUT pin is not bonded in the 64-pin package.
MOTOROLA
20
MC68HC11KA4
MC68HC11KA4TS/D

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