M95320-R 查看數據表（PDF） - STMicroelectronics

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生产厂家

M95320-R

32-Kbit serial SPI bus EEPROM with high-speed clock

STMicroelectronics 

M95320-W M95320-R M95320-DR

Instructions

6.1

Write Enable (WREN)

The Write Enable Latch (WEL) bit must be set prior to each WRITE and WRSR instruction.

The only way to do this is to send a Write Enable instruction to the device.

As shown in Figure 7, to send this instruction to the device, Chip Select (S) is driven low,

and the bits of the instruction byte are shifted in, on Serial Data Input (D). The device then

enters a wait state. It waits for the device to be deselected, by Chip Select (S) being driven

high.

Figure 7. Write Enable (WREN) sequence

S

01234567

C

Instruction

D

High Impedance

Q

AI02281E

Doc ID 5711 Rev 14

17/48

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