MAX17005ETP 查看數據表（PDF） - Maxim Integrated

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MAX17005ETP

1.2MHz Low-Cost, High-Performance Chargers

Maxim Integrated 

1.2MHz Low-Cost,

High-Performance Chargers

If RESR is small enough, its associated output zero has

a negligible effect near crossover and the loop-transfer-

function can be simplified as follows:

LTF

=

GMOUT

×

RCC

sCOUT

GMV

Setting LTF = 1 to solve for the unity-gain frequency

yields:

fCO _ CV

=

GMOUT

× GMV

×

RCC

2π × COUT

For stability, choose a crossover frequency lower than

1/10 the switching frequency (fOSC). For example,

choose a crossover frequency of 50kHz and solve for

RCC using the component values listed in Figure 1 to

yield RCC = 3kΩ:

RCC

=

2π × COUT × fCO _ CV

GMV × GMOUT

≅ 3kΩ

GMV = 0.125μA/mV

GMOUT = 5A/V

COUT = 4.7μF

fOSC_CV = 600kHz

RL = 0.2Ω

fCO_CV = 50kHz

To ensure that the compensation zero adequately can-

cels the output pole, select fZ_CV ≤ fP_OUT:

CCC ≥ (RL/RCC) x COUT

CCC ≥ 300pF (assuming 2 cells and 2A maximum

charge current).

80

0

60

40

-45

20

0

-90

-20

-40

0.1

MAG

PHASE

-135

1 10 100 1k 10k 100k 1M

FREQUENCY (Hz)

Figure 8 shows the Bode plot of the voltage-loop-

frequency response using the values calculated above.

MOSFET Drivers

The DHI and DLO outputs are optimized for driving

moderate-sized power MOSFETs. The MOSFET drive

capability is the same for both the low-side and high-

sides switches. This is consistent with the variable duty

factor that occurs in the notebook computer environ-

ment where the battery voltage changes over a wide

range. There must be a low-resistance, low-inductance

path from the DLO driver to the MOSFET gate to pre-

vent shoot-through. Otherwise, the sense circuitry in the

MAX17005/MAX17006 interpret the MOSFET gate as

“off” while there is still charge left on the gate. Use very

short, wide traces measuring 10 to 20 squares or fewer

(1.25mm to 2.5mm wide if the MOSFET is 25mm from

the device). Unlike the DLO output, the DHI output uses

a 50ns (typ) delay time to prevent the low-side MOSFET

from turning on until DHI is fully off. The same consider-

ations should be used for routing the DHI signal to the

high-side MOSFET.

The high-side driver (DHI) swings from LX to 5V above

LX (BST) and has a typical impedance of 1.5Ω sourcing

and 0.8Ω sinking. The strong high-side MOSFET driver

eliminates most of the power dissipation due to switch-

ing losses. The low-side driver (DLO) swings from LDO

to ground and has a typical impedance of 3Ω sinking

and 3Ω sourcing. This helps prevent DLO from being

pulled up when the high-side switch turns on due to

capacitive coupling from the drain to the gate of the

low-side MOSFET. This places some restrictions on the

MOSFETs that can be used. Using a low-side

MOSFET with smaller gate-to-drain capacitance can

prevent these problems.

Design Procedure

MOSFET Selection

Choose the n-channel MOSFETs according to the maxi-

mum required charge current. The MOSFETs must be

able to dissipate the resistive losses plus the switching

losses at both VDCIN(MIN) and VDCIN(MAX).

For the high-side MOSFET, the worst-case resistive

power losses occur at the maximum battery voltage

and minimum supply voltage:

PDCOND (High Side)

=

VBATT(MAX)

VDCIN(MIN)

× ICHG2

×

RDS(ON)

Figure 8. CC Loop Response

18 ______________________________________________________________________________________

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