MAX17005AETP 查看數據表（PDF） - Maxim Integrated

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MAX17005AETP

1.2MHz, Low-Cost, High-Performance Chargers

Maxim Integrated 

1.2MHz, Low-Cost,

High-Performance Chargers

Generally, a low gate charge high-side MOSFET is pre-

ferred to minimize switching losses. However, the

RDS(ON) required to stay within package power dissi-

pation often limits how small the MOSFET can be. The

optimum occurs when the switching losses equal the

conduction losses. High-side switching losses do not

usually become an issue until the input is greater than

approximately 15V. Calculating the power dissipation in

N1 due to switching losses is difficult since it must

allow for difficult quantifying factors that influence the

turn-on and turn-off times. These factors include the

internal gate resistance, gate charge, threshold volt-

age, source inductance, and PCB layout characteris-

tics. The following switching-loss calculation provides

only a very rough estimate and is no substitute for

breadboard evaluation, preferably including a verifica-

tion using a thermocouple mounted on N1:

PDSW (HS)

=

1

2

×

tTRANS

×

VCSSP

× ICHG

×

fSW

where tTRANS is the drivers transition time and can be

calculated as follows:

( ) tTRANS

=

⎛

⎝⎜

1

IGSRC

+

1

IGSNK

⎞

⎠⎟

×

QGD + QGS

IGSRC and IGSNK are the peak gate-drive source/sink

current (3Ω sourcing and 0.8Ω sinking, typically). The

MAX17005A/MAX17006A/MAX17015A control the

switching frequency as shown in the Typical Operating

Characteristics.

The following is the power dissipated due to high-side

n-channel MOSFET’s output capacitance (CRSS):

PDCRSS (HS)

≈

V2CSSP

×

CRSS

2

×

fSW

The following high-side MOSFET’s loss is due to the

reverse-recovery charge of the low-side MOSFET’s

body diode:

PDQRR (HS)

=

QRR2

×

VCSSP

2

×

fSW

Ignore PDQRR(HS) if a Schottky diode is used parallel

to a low-side MOSFET.

The total high-side MOSFET power dissipation is:

PDTOTAL (HS) ≈ PDCOND(HS) + PDSW (HS)

+ PDCRSS (HS) + PDQRR(HS)

Switching losses in the high-side MOSFET can become

an insidious heat problem when maximum AC adapter

voltages are applied. If the high-side MOSFET chosen

for adequate RDS(ON) at low-battery voltages becomes

hot when biased from VDCIN(MAX), consider choosing

another MOSFET with lower parasitic capacitance.

For the low-side MOSFET (N2), the worst-case power

dissipation always occurs at maximum input voltage:

PDCOND(LS)

=

⎛

⎜1-

⎝

VBATT(MIN)

VCSSP(MAX)

⎞

⎟

⎠

×

ICHG2

×

RDS(ON)

The following additional loss occurs in the low-side

MOSFET due to the body diode conduction losses:

PDBDY (LS) = 0.05 × IPEAK × 0.4V

The total power low-side MOSFET dissipation is:

PDTOTAL (LS) ≈ PDCOND(LS) + PDBDY (LS)

These calculations provide an estimate and are not a

substitute for breadboard evaluation, preferably

including a verification using a thermocouple mounted

on the MOSFET.

Inductor Selection

The selection of the inductor has multiple trade-offs

between efficiency, transient response, size, and cost.

Small inductance is cheap and small, and has a better

transient response due to higher slew rate; however, the

efficiency is lower because of higher RMS current. High

inductance results in lower ripple so that the need of the

output capacitors for output-voltage ripple goes low.

The MAX17005A/MAX17006A/MAX17015A combine all

the inductor trade-offs in an optimum way by controlling

switching frequency. High-frequency operation permits

the use of a smaller and cheaper inductor, and conse-

quently results in smaller output ripple and better tran-

sient response.

The charge current, ripple, and operating frequency

(off-time) determine the inductor characteristics. For

optimum efficiency, choose the inductance according

to the following equation:

L=

k × VIN2

4 × ICHG × LIRMAX

where k = 35ns/V.

______________________________________________________________________________________ 19

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