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MAX1875-MAX1876 查看數據表(PDF) - Maxim Integrated

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MAX1875-MAX1876 Datasheet PDF : 21 Pages
First Prev 11 12 13 14 15 16 17 18 19 20
Dual 180° Out-of-Phase PWM Step-
Down Controllers with POR
VL
BST_
5
DH_
LX_
MAX1875
INPUT
(VIN)
Figure 3. Reducing the Switching-Node Rise Time
On the rising edge of EN both controllers enter soft-
start. Soft-start gradually ramps up to the reference
voltage seen by the error amplifier in order to control
the outputsrate of rise and reduce input surge cur-
rents during startup. The soft-start period is 1024 clock
cycles (1024/fSW), and the internal soft-start DAC
ramps up the voltage in 64 steps. The output reaches
regulation when soft-start is completed. On the falling
edge of EN both controllers simultaneously enter soft-
stop, which reverses the soft-start ramp. The part
enters shutdown after soft-stop is complete.
Reset Output (MAX1876 Only)
RST is an open-drain output. RST pulls low when either
output falls below 90% of its nominal regulation voltage.
Once both outputs exceed 90% of their nominal regulation
voltages and both soft-start cycles are completed, RST
goes high impedance. To obtain a logic-voltage output,
connect a pullup resistor from RST to the logic supply volt-
age. A 100kresistor works well for most applications. If
unused, leave RST grounded or unconnected.
Clock Synchronization (SYNC, CKO)
SYNC serves two functions: SYNC selects the clock
output (CKO) type used to synchronize slave con-
trollers, or it serves as a clock input so the
MAX1875/MAX1876 can be synchronized with an exter-
nal clock signal. This allows the MAX1875/MAX1876 to
funtion as either a master or slave. CKO provides a
clock signal synchronized to the MAX1875/MAX1876s
switching frequency, allowing either in-phase (SYNC =
GND) or 90° out-of-phase (SYNC = VL) synchronization
of additional DC-DC controllers (Figure 5). The
MAX1875/MAX1876 support the following three operat-
ing modes:
SYNC = GND: The CKO output frequency equals
REG1s switching frequency (fCKO = fDH1) and the
CKO signal is in phase with REG1s switching fre-
quency. This provides 2-phase operation when syn-
chronized with a second slave controller.
SYNC = VL: The CKO output frequency equals two
times REG1s switching frequency (fCKO = 2fDH1)
and the CKO signal is phase shifted by 90° with
respect to REG1s switching frequency. This pro-
vides 4-phase operation when synchronized with a
second MAX1875/MAX1876 (slave controller).
SYNC Driven by External Oscillator: The controller
generates the clock signal by dividing down the
SYNC input signal, so that the switching frequency
equals half the synchronization frequency (fSW =
fSYNC/2). REG1s conversion cycles initiate on the ris-
ing edge of the internal clock signal. The CKO output
frequency and phase match REG1s switching fre-
quency (fCKO = fDH1) and the CKO signal is in
phase. Note that the MAX1875/MAX1876 still require
ROSC when SYNC is externally clocked and the inter-
nal oscillator frequency should be set to 50% of the
synchronization frequency (fOSC = 0.5 fSYNC).
Thermal Overload Protection
Thermal overload protection limits total power dissipation
in the MAX1875/MAX1876. When the devices die-junc-
tion temperature exceeds TJ = +160°C, an on-chip ther-
mal sensor shuts down the device, forcing DL_ and DH_
low, allowing the IC to cool. The thermal sensor turns the
part on again after the junction temperature cools by
10°C. During thermal shutdown, the regulators shut
down, RST goes low, and soft-start is reset. If the VL lin-
ear-regulator output is short-circuited, thermal-overload
protection is triggered.
Design Procedure
Effective Input Voltage Range
Although, the MAX1875/MAX1876 controllers can oper-
ate from input supplies ranging from 4.75V to 23V, the
input voltage range can be effectively limited by the
MAX1875/MAX1876sduty-cycle limitations. The maxi-
mum input voltage is limited by the minimum on-time
(tON(MIN)):
VIN(MAX)
VOUT
tON(MIN)fSW
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