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MAX3390E 查看數據表(PDF) - Maxim Integrated

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MAX3390E Datasheet PDF : 31 Pages
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±15kV ESD-Protected, 1µA, 16Mbps, Dual/Quad
Low-Voltage Level Translators in UCSP
Detailed Description
The MAX3372E–MAX3379E and MAX3390E–MAX3393E
ESD-protected level translators provide the level shifting
necessary to allow data transfer in a multivoltage system.
Externally applied voltages, VCC and VL, set the logic lev-
els on either side of the device. A low-voltage logic signal
present on the VL side of the device appears as a high-
voltage logic signal on the VCC side of the device, and
vice-versa. The MAX3374E/MAX3375E/MAX3376E/
MAX3379E and MAX3390E–MAX3393E unidirectional
level translators level shift data in one direction (VL
VCC or VCC VL) on any single data line. The
MAX3372E/MAX3373E and MAX3377E/MAX3378E bidi-
rectional level translators utilize a transmission-gate-
based design (see Figure 2) to allow data translation in
either direction (VL VCC) on any single data line. The
MAX3372E–MAX3379E and MAX3390E–MAX3393E
accept VL from +1.2V to +5.5V and VCC from +1.65V to
+5.5V, making them ideal for data transfer between low-
voltage ASICs/PLDs and higher voltage systems.
All devices in the MAX3372E–MAX3379E, MAX3390E–
MAX3393E family feature a three-state output mode that
reduces supply current to less than 1µA, thermal short-
circuit protection, and ±15kV ESD protection on the VCC
side for greater protection in applications that route sig-
nals externally. The MAX3372E/MAX3377E operate at a
guaranteed data rate of 230kbps. Slew-rate limiting
reduces EMI emissions in all 230kbps devices. The
MAX3373E–MAX3376E/MAX3378E/MAX3379E and
MAX3390E–MAX3393E operate at a guaranteed data rate
of 8Mbps over the entire specified operating voltage
range. Within specific voltage domains, higher data rates
are possible. (See the Timing Characteristics table.)
VL
VCC
VL VCC
MAX3372E–MAX3379E
AND MAX3390E–MAX3393E
I/O VL_
I/O VCC_
DATA
GND
RLOAD
CLOAD
VL
VCC
VL VCC
CLOAD
DATA
MAX3372E–MAX3379E
AND MAX3390E–MAX3393E
I/O VL_
I/O VCC_
RLOAD
GND
I/O VL_
(tRISE,
tFALL < 10ns)
tPD-VCC-LH
tPD-VCC-HL
I/O VCC_
(tRISE,
tFALL < 10ns)
tPD-VL-LH
tPD-VL-HL
I/O VCC_
tRVCC
tFVCC
Figure 1a. Rail-to-Rail Driving I/O VL
I/O VL_
tRVL
tFVL
Figure 1b. Rail-to-Rail Driving I/O VCC
10 ______________________________________________________________________________________

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