MAX4736ETCT 查看數據表（PDF） - Maxim Integrated
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MAX4736ETCT Datasheet PDF : 10 Pages
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MAX4736
0.6Ω, Low-Voltage, Single-Supply, Dual SPDT
Analog Switch
General Description
The MAX4736 is a low on-resistance, low-voltage, dual
single-pole/double throw (SPDT) analog switch that oper-
ates from a single 1.6V to 4.2V supply. This device has
fast switching speeds (tON = 25ns, tOFF = 20ns max),
handles rail-to-rail analog signals, and consumes less
than 4μW of quiescent power. The MAX4736 has break-
before-make switching.
When powered from a 3V supply, the MAX4736 features
low 0.6Ω on-resistance (RON), with 0.1Ω RON matching
and 0.05Ω RON flatness. The digital logic input is 1.8V
CMOS compatible when using a single 3V supply.
The MAX4736 has one normally open (NO) switch and
one normally closed (NC) switch, and is available in
12-pin TQFN (3mm x 3mm), 10-pin μMAX, and 10-pin
μDFN (2mm x 2mm) packages.
Applications
●● Power Routing
●● Battery-Powered Systems
●● Audio and Video Signal Routing
●● Low-Voltage Data-Acquisition Systems
●● Communications Circuits
●● PCMCIA Cards
●● Cellular Phones
●● Modems
●● Hard Drives
Benefits and Features
●● Low RON
0.6Ω (3V Supply)
1.5Ω (1.8V Supply)
●● 0.1Ω max RON Flatness (3V Supply)
●● Single-Supply Operation Down to 1.6V
●● Available in TQFN, μDFN, and μMAX Packages
●● 1.8V CMOS Logic Compatible (3V Supply)
●● Fast Switching: tON = 25ns, tOFF = 20ns
Ordering Information
PART
TEMP RANGE PIN-PACKAGE
MAX4736EUB+
-40°C to +85°C
10 µMAX
MAX4736EUB+T
-40°C to +85°C
10 µMAX
MAX4736ETC+
-40°C to +85°C
12 TQFN
(3mm x 3mm)
MAX4736ETC+T
-40°C to +85°C
12 TQFN
(3mm x 3mm)
MAX4736ELB+
-40°C to +85°C
10 µDFN
(2mm x 2mm)
MAX4736ELB+T
-40°C to +85°C
10 µDFN
(2mm x 2mm)
T = Tape and reel.
+Denotes lead(Pb)-free/RoHS-compliant package.
Pin Configurations/Functional Diagrams/Truth Table
TOP VIEW
NO1 1
GND 2
NO2 3
IN1 COM1 N.C.
12 11 10
9 NC1
MAX4736
8 V+
7 NC2
456
IN2 COM2 N.C.
TQFN
IN1 1
NO1 2
GND 3
NO2 4
IN2 5
MAX4736
µMAX/µDFN
10 COM1
9 NC1
8 V+
7 NC2
6 COM2
MAX4736
IN_ NO_ NC_
0
OFF ON
1
ON OFF
SWITCHES SHOWN
FOR LOGIC 0 INPUT
NOTE: CONNECT EXPOSED PAD ON
TQFN AND µDFN TO GND.
19-2382; Rev 4; 11/16
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