MAX8566(2005) 查看數據表（PDF） - Maxim Integrated
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MAX8566 Datasheet PDF : 21 Pages
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High-Efficiency, 10A, PWM
Internal-Switch Step-Down Regulator
LX
MAX8566
FB
COMP
L
R2
R3
C3
R1 C1
R4
C2
Figure 4. Type 3 Compensation Network
determined by the frequencies of the double pole and
ESR zero of the power transfer function. It is also a func-
tion of the desired closed-loop bandwidth. The following
section outlines the step-by-step design procedure to
calculate the required compensation components.
Begin by setting the desired output voltage. The output
voltage is set using a resistor-divider from the output to
GND with FB at the center tap (R3 and R4 in Figure 4).
Use 20kΩ for R4 and calculate R3 as:
R3
= R4
×
⎛
⎝⎜
VOUT
0.6V
− 1⎞⎠⎟
The zero-cross frequency of the closed-loop, fC, should
be less than 20% of the switching frequency, fS.
Higher zero-cross frequency results in faster transient
response. It is recommended that the zero-cross fre-
quency of the closed loop should be chosen between
10% and 20% of the switching frequency. Once fC is
chosen, C1 is calculated from the following equation:
C1 =
20 × VIN
fC
×
2
×
π
×
R3
×
⎛⎝⎜1+
RL
RO
⎞
⎠⎟
Due to the underdamped nature of the output LC dou-
ble pole, set the two zero frequencies of the Type 3
compensation less than the LC double-pole frequency
to provide adequate phase boost. Set the two zero fre-
quencies to 80% of the LC double-pole frequency.
Hence:
R1 = 1 × L × CO × (RO + ESR)
0.8 × C1
RL + RO
C3 = 1 × L × CO × (RO + ESR)
0.8 × R3
RL + RO
Set the second compensation pole, fP2_EA, at fZ_ESR
yields:
C2 = CO × C1 × ESR
R1 × C1− CO × ESR
Set the third compensation pole at 1/2 of the switching
frequency to gain some phase margin. Calculate R2 as
follows:
R2 =
1
π × C3 × fS
The above equations provide accurate compensation
when the zero-cross frequency is significantly higher
than the double-pole frequency. When the zero-cross
frequency is near the double-pole frequency, the actual
zero-cross frequency is higher than the calculated fre-
quency. In this case, lowering the value of R1 reduces
the zero-cross frequency. Also, set the third pole of the
Type 3 compensation close to the switching frequency
if the zero-cross frequency is above 200kHz to boost
the phase margin. Please note that the value of R4 can
be altered to make the values of the compensation
components practical. The recommended range for R4
is 10kΩ to 50kΩ.
PC Board Layout Considerations
and Thermal Performance
The MAX8566EVKIT provides an optimal layout and
should be followed closely. For custom design, follow
these guidelines:
1) Place decoupling capacitors (VDD and SS) as close
to the IC as possible. Keep the power ground plane
(connected to PGND) and signal ground plane (con-
nected to GND) separate.
______________________________________________________________________________________ 17
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