MAX9720 查看數據表（PDF） - Maxim Integrated

零件编号

产品描述 (功能)

生产厂家

MAX9720

50mW, DirectDrive, Stereo Headphone Amplifier with SmartSense and Shutdown

Maxim Integrated 

50mW, DirectDrive, Stereo Headphone

Amplifier with SmartSense and Shutdown

Table 2. Suggested Capacitor Manufacturers

SUPPLIER

Taiyo Yuden

TDK

PHONE

800-348-2498

847-803-6100

FAX

847-925-0899

847-390-4405

WEBSITE

www.t-yuden.com

www.component.tdk.com

Charge-Pump Capacitor Selection

Use capacitors with an ESR less than 100mΩ for opti-

mum performance. Low-ESR ceramic capacitors mini-

mize the output resistance of the charge pump. For

best performance over the extended temperature

range, select capacitors with an X7R dielectric. Table 2

lists suggested manufacturers.

Flying Capacitor (C1)

The value of the flying capacitor (C1) affects the charge

pump’s load regulation and output impedance. A C1

value that is too small degrades the device’s ability to

provide sufficient current drive, which leads to a loss of

output voltage. In most applications, 1µF for both C1

and C2 provides adequate performance. Increasing

the value of C1 improves load regulation and reduces

the charge-pump output resistance to an extent. See

the Output Power vs. Charge Pump Capacitance and

Load Resistance graph in the Typical Operating

Characteristics. Above 2.2µF, the on-resistance of the

switches and the ESR of C1 and C2 dominate.

Hold Capacitor (C2)

The hold capacitor value and ESR directly affect the

ripple on PVSS. Increasing the value of C2 reduces out-

put ripple. Likewise, decreasing the ESR of C2 reduces

both ripple and output impedance. Lower capacitance

values can be used in systems with low maximum out-

put power levels. See the Output Power vs. Charge-

Pump Capacitance and Load Resistance graph in the

Typical Operating Characteristics.

Power-Supply Bypass Capacitor

The power-supply bypass capacitor (C3) lowers the

output impedance of the power supply and reduces the

impact of the MAX9720’s charge-pump switching tran-

sients. Bypass VDD with C3, the same value as C1, and

place it physically close to the device.

TIME Capacitor

The TIME capacitor (CTIME) sets the HPS debounce

time. The debounce time is the delay between HPS

exceeding 0.8 x VDD and the execution of the

SmartSense routine. The delay ensures that any exces-

sive contact bounce caused by the insertion of a head-

phone plug into the jack does not cause HPS to

register an invalid state (Figure 9). The value of the

CTIME in nF equals the nominal delay time in ms, i.e.,

CTIME = 10nF = tDELAY = 10ms. CTIME values in the

200nF to 600nF range are recommended.

Adding Volume Control

The addition of a digital potentiometer provides simple,

digital volume control. Figure 10 shows the MAX9720

with the MAX5408 dual log taper digital potentiometer

used as an input attenuator. Connect the high terminal

of the MAX5408 to the audio input, the low terminal to

GND, and the wiper to CIN. Setting the wiper to the top

position passes the audio signal unattenuated. Setting

the wiper to the lowest position fully attenuates the input.

Layout and Grounding

Proper layout and grounding are essential for optimum

performance. Connect PGND and SGND together at a

single point on the PC board. Connect all components

associated with the charge pump (C2 and C3) to the

PGND plane. Connect PVSS and SVSS together at the

device. Bypassing of both the positive and negative

supplies is accomplished by the charge-pump capaci-

tors, C2 and C3 (see Typical Application Circuit). Place

capacitors C1 and C3 as close to the device as possi-

ble. Place capacitor C2 as close to PVSS as possible.

Route PGND and all traces that carry switching tran-

sients away from SGND, traces, and components in the

audio signal path.

16 ______________________________________________________________________________________

Share Link: