MB84VA2005 查看數據表（PDF） - Fujitsu

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MB84VA2005

8M (× 8) FLASH MEMORY & 1M (× 8) STATIC RAM

Fujitsu 

MB84VA2004-10/MB84VA2005-10

• Read Only Operations Characteristics (Flash)

Parameter

Symbols

JEDEC Standard

Description

tAVAV

tRC Read Cycle Time

tAVQV

tACC Address to Output Delay

tELQV

tGLQV

tEHQZ

tGHQZ

tAXQX

—

tCEf

tOE

tDF

tDF

tOH

tREADY

Chip Enable to Output Delay

Output Enable to Output Delay

Chip Enable to Output High-Z

Output Enable to Output High-Z

Output Hold Time From Addresses,

CEf or OE, Whichever Occurs First

RESET Pin Low to Read Mode

Note: Test Conditions–Output Load: 1 TTL gate and 30 pF

Input rise and fall times: 5 ns

Input pulse levels: 0.0 V to 3.0 V

Timing measurement reference level

Input: 1.5 V

Output: 1.5 V

Test

Setup

—

CEf = VIL

OE = VIL

OE = VIL

—

—

—

—

—

-10

(Note)

Unit

Min. Max.

100

—

ns

—

100 ns

—

100 ns

—

40

ns

—

30

ns

—

30

ns

0

—

ns

—

20

µs

13

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