MB95FV100D-103PBT 查看數據表（PDF） - Fujitsu
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MB95FV100D-103PBT Datasheet PDF : 74 Pages
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MB95160M Series
Address
0FAAH
0FABH
0FACH
0FADH
0FAEH
0FAFH
0FB0H
to
0FBBH
0FBCH
0FBDH
0FBEH
0FBFH
0FC0H
to
0FC2H
0FC3H
0FC4H
0FC5H
0FC6H
0FC7H
0FC8H
0FC9H
0FCAH
0FCBH
0FCCH
0FCDH
to
0FDCH
0FDDH
to
0FE2H
0FE3H
Register
abbreviation
PDCRH0
PDCRL0
PCSRH0
PCSRL0
PDUTH0
PDUTL0
Register name
16-bit PPG down counter register (upper byte) ch.0
16-bit PPG down counter register (lower byte) ch.0
16-bit PPG cycle setting buffer register (upper byte) ch.0
16-bit PPG cycle setting buffer register (lower byte) ch.0
16-bit PPG duty setting buffer register (upper byte) ch.0
16-bit PPG duty setting buffer register (lower byte) ch.0
⎯
(Disabled)
BGR1
BGR0
PSSR0
BRSR0
LIN-UART baud rate generator register 1
LIN-UART baud rate generator register 0
UART/SIO dedicated baud rate generator prescaler selecting
register ch.0
UART/SIO dedicated baud rate generator setting register ch.0
⎯
(Disabled)
AIDRL
LCDCC
LCDCE1
LCDCE2
LCDCE3
LCDCE4
LCDCE5
⎯
LCDCB1
LCDCB2
A/D input disable register (lower byte)
LCDC control register
LCDC enable register 1
LCDC enable register 2
LCDC enable register 3
LCDC enable register 4
LCDC enable register 5
(Disabled)
LCDC blinking setting register 1
LCDC blinking setting register 2
LCDRAM
LCDC display RAM
⎯
WCDR
(Disabled)
Watch counter data register
R/W
R
R
R/W
R/W
R/W
R/W
⎯
R/W
R/W
R/W
R/W
⎯
R/W
R/W
R/W
R/W
R/W
R/W
R/W
⎯
R/W
R/W
R/W
⎯
R/W
Initial value
00000000B
00000000B
11111111B
11111111B
11111111B
11111111B
⎯
00000000B
00000000B
00000000B
00000000B
⎯
00000000B
00010000B
00110000B
00000000B
00000000B
00000000B
00000000B
⎯
00000000B
00000000B
00000000B
⎯
00111111B
(Continued)
26
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